From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Yoshinori Sato <ysato@users.sourceforge.jp>, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org
Subject: Re: [Qemu-devel] [PATCH v17 00/24] Add RX archtecture support
Date: Fri, 7 Jun 2019 16:06:54 +0200 [thread overview]
Message-ID: <0501e7a3-9a04-3712-18fe-d946acc86bca@redhat.com> (raw)
In-Reply-To: <20190607091116.49044-1-ysato@users.sourceforge.jp>
Hi Yoshinori,
On 6/7/19 11:10 AM, Yoshinori Sato wrote:
> Hello.
> This patch series is added Renesas RX target emulation.
>
> Changes v17.
> Remove cpu class name suffix.
I was a bit annoyed you did not collect my review effort from the
previous series. It is time-saving for reviewers because you don't have
to re-review the same code twice.
>
> My git repository is bellow.
> git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git tags/rx-20190607
>
> Testing binaries bellow.
> u-boot
> Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz
>
> starting
> $ gzip -d u-boot.bin.gz
> $ qemu-system-rx -bios u-boot.bin
>
> linux and pico-root (only sash)
> Download - https://osdn.net/users/ysato/pf/qemu/dl/zImage (kernel)
> https://osdn.net/users/ysato/pf/qemu/dl/rx-qemu.dtb (DeviceTree)
>
> starting
> $ qemu-system-rx -kernel zImage -dtb rx-qemu.dtb -append "earlycon"
>
>
> Richard Henderson (11):
> target/rx: Convert to CPUClass::tlb_fill
> target/rx: Add RX to SysEmuTarget
> target/rx: Fix cpu types and names
> tests: Add rx to machine-none-test.c
> hw/rx: Honor -accel qtest
> target/rx: Disassemble rx_index_addr into a string
> target/rx: Replace operand with prt_ldmi in disassembler
> target/rx: Use prt_ldmi for XCHG_mr disassembly
> target/rx: Emit all disassembly in one prt()
> target/rx: Collect all bytes during disassembly
> target/rx: Dump bytes for each insn during disassembly
>
> Yoshinori Sato (13):
> target/rx: TCG translation
> target/rx: TCG helper
> target/rx: CPU definition
> target/rx: RX disassembler
> hw/intc: RX62N interrupt controller (ICUa)
> hw/timer: RX62N internal timer modules
> hw/char: RX62N serial communication interface (SCI)
> hw/rx: RX Target hardware definition
> qemu/bitops.h: Add extract8 and extract16
> hw/registerfields.h: Add 8bit and 16bit register macros
> Add rx-softmmu
> MAINTAINERS: Add RX
> target/rx: Remove suffix in cpu class.
I'd move the last patch directly after "target/rx: Fix cpu types and names".
Actually I rebased it this way:
[PATCH 01/24] target/rx: TCG translation
[PATCH 02/24] target/rx: TCG helper
[PATCH 03/24] target/rx: CPU definition
[PATCH 04/24] target/rx: RX disassembler
[PATCH 18/24] target/rx: Disassemble rx_index_addr into a string
[PATCH 19/24] target/rx: Replace operand with prt_ldmi in disassembler
[PATCH 20/24] target/rx: Use prt_ldmi for XCHG_mr disassembly
[PATCH 21/24] target/rx: Emit all disassembly in one prt()
[PATCH 22/24] target/rx: Collect all bytes during disassembly
[PATCH 23/24] target/rx: Dump bytes for each insn during disassembly
[PATCH 05/24] hw/intc: RX62N interrupt controller (ICUa)
[PATCH 06/24] hw/timer: RX62N internal timer modules
[PATCH 07/24] hw/char: RX62N serial communication interface (SCI)
[PATCH 08/24] hw/rx: RX Target hardware definition
[PATCH 09/24] qemu/bitops.h: Add extract8 and extract16
[PATCH 10/24] hw/registerfields.h: Add 8bit and 16bit register macros
[PATCH 11/24] target/rx: Convert to CPUClass::tlb_fill
[PATCH 13/24] target/rx: Fix cpu types and names
[PATCH 24/24] target/rx: Remove suffix in cpu class.
[PATCH 12/24] target/rx: Add RX to SysEmuTarget
[PATCH 14/24] tests: Add rx to machine-none-test.c
[PATCH 15/24] hw/rx: Honor -accel qtest
[PATCH 16/24] Add rx-softmmu
[PATCH 17/24] MAINTAINERS: Add RX
On Linux + win32 running u-boot + Linux as suggested:
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
next prev parent reply other threads:[~2019-06-07 14:13 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-07 9:10 [Qemu-devel] [PATCH v17 00/24] Add RX archtecture support Yoshinori Sato
2019-06-07 9:10 ` [Qemu-devel] [PATCH v17 01/24] target/rx: TCG translation Yoshinori Sato
2019-06-07 9:10 ` [Qemu-devel] [PATCH v17 02/24] target/rx: TCG helper Yoshinori Sato
2019-06-07 9:10 ` [Qemu-devel] [PATCH v17 03/24] target/rx: CPU definition Yoshinori Sato
2019-06-07 9:10 ` [Qemu-devel] [PATCH v17 04/24] target/rx: RX disassembler Yoshinori Sato
2019-06-07 9:10 ` [Qemu-devel] [PATCH v17 05/24] hw/intc: RX62N interrupt controller (ICUa) Yoshinori Sato
2019-06-07 9:10 ` [Qemu-devel] [PATCH v17 06/24] hw/timer: RX62N internal timer modules Yoshinori Sato
2019-06-07 9:10 ` [Qemu-devel] [PATCH v17 07/24] hw/char: RX62N serial communication interface (SCI) Yoshinori Sato
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 08/24] hw/rx: RX Target hardware definition Yoshinori Sato
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 09/24] qemu/bitops.h: Add extract8 and extract16 Yoshinori Sato
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 10/24] hw/registerfields.h: Add 8bit and 16bit register macros Yoshinori Sato
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 11/24] target/rx: Convert to CPUClass::tlb_fill Yoshinori Sato
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 12/24] target/rx: Add RX to SysEmuTarget Yoshinori Sato
2019-06-07 13:39 ` Philippe Mathieu-Daudé
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 13/24] target/rx: Fix cpu types and names Yoshinori Sato
2019-06-07 14:06 ` Philippe Mathieu-Daudé
2019-06-07 14:19 ` Igor Mammedov
2019-06-10 5:51 ` Yoshinori Sato
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 14/24] tests: Add rx to machine-none-test.c Yoshinori Sato
2019-06-07 14:05 ` Philippe Mathieu-Daudé
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 15/24] hw/rx: Honor -accel qtest Yoshinori Sato
2019-06-07 13:40 ` Philippe Mathieu-Daudé
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 16/24] Add rx-softmmu Yoshinori Sato
2019-06-07 13:44 ` Philippe Mathieu-Daudé
2019-06-07 14:03 ` Richard Henderson
2019-06-07 14:08 ` Philippe Mathieu-Daudé
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 17/24] MAINTAINERS: Add RX Yoshinori Sato
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 18/24] target/rx: Disassemble rx_index_addr into a string Yoshinori Sato
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 19/24] target/rx: Replace operand with prt_ldmi in disassembler Yoshinori Sato
2019-06-07 13:42 ` Philippe Mathieu-Daudé
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 20/24] target/rx: Use prt_ldmi for XCHG_mr disassembly Yoshinori Sato
2019-06-07 13:43 ` Philippe Mathieu-Daudé
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 21/24] target/rx: Emit all disassembly in one prt() Yoshinori Sato
2019-06-07 13:42 ` Philippe Mathieu-Daudé
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 22/24] target/rx: Collect all bytes during disassembly Yoshinori Sato
2019-06-07 13:43 ` Philippe Mathieu-Daudé
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 23/24] target/rx: Dump bytes for each insn " Yoshinori Sato
2019-06-07 13:42 ` Philippe Mathieu-Daudé
2019-06-07 9:11 ` [Qemu-devel] [PATCH v17 24/24] target/rx: Remove suffix in cpu class Yoshinori Sato
2019-06-07 14:04 ` Philippe Mathieu-Daudé
2019-06-07 11:46 ` [Qemu-devel] [PATCH v17 00/24] Add RX archtecture support no-reply
2019-06-07 13:25 ` no-reply
2019-06-07 14:06 ` Philippe Mathieu-Daudé [this message]
2019-06-07 17:12 ` no-reply
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