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From: "Huang, Kai" <kai.huang@intel.com>
To: "yang.zhong@linux.intel.com" <yang.zhong@linux.intel.com>
Cc: "pbonzini@redhat.com" <pbonzini@redhat.com>,
	"Yang, Weijiang" <weijiang.yang@intel.com>,
	"Zhong, Yang" <yang.zhong@intel.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: Re: [PATCH] target/i386: Switch back XFRM value
Date: Thu, 13 Oct 2022 08:47:55 +0000	[thread overview]
Message-ID: <0582a898ae1b6423be498201a77c4f1927dd1f27.camel@intel.com> (raw)
In-Reply-To: <Y0eu9Nq/fhZLKwCt@yangzhon>

On Thu, 2022-10-13 at 02:23 -0400, Yang Zhong wrote:
> > > enclave only supported SSE and x87 feature(xfrm=0x3).
> > 
> > Is this true?  Perhaps I am missing something, but it seems env-
> > > features[FEAT_XSAVE_XCR0_LO] only includes LBR bit, which is bit 15.
> 
>   We printed the XFRM value from SGX SDK to find this issue.

I don't know how you added the print, but the exact value that set to SGX CPUID
is irrelevant, as it is wrong anyway.  The value can also differ when you run on
different machines, etc.  IMHO in changelog we just need to point out the fact
that the XSAVE enabling patch wrongly messed up with SGX CPUID and this patch
fixes that.

      reply	other threads:[~2022-10-13  9:14 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-12  8:26 [PATCH] target/i386: Switch back XFRM value Yang Zhong
2022-10-12  9:59 ` Huang, Kai
2022-10-13  6:23   ` Yang Zhong
2022-10-13  8:47     ` Huang, Kai [this message]

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