From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: BALATON Zoltan <balaton@eik.bme.hu>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [PATCH] hw/isa/vt82c686: Keep track of PIRQ/PINT pins separately
Date: Mon, 15 Apr 2024 16:47:39 +0200 [thread overview]
Message-ID: <05baa627-64ee-41b7-a206-3b05f694c2f5@linaro.org> (raw)
In-Reply-To: <20240410222543.0EA534E6005@zero.eik.bme.hu>
On 11/4/24 00:25, BALATON Zoltan wrote:
> Move calculation of mask after the switch which sets the function
> number for PIRQ/PINT pins to make sure the state of these pins are
> kept track of separately and IRQ is raised if any of them is active.
>
> Fixes: 7e01bd80c1 hw/isa/vt82c686: Bring back via_isa_set_irq()
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
> Preferably for 9.0 if there will be another RC.
>
> hw/isa/vt82c686.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Queued, thanks.
prev parent reply other threads:[~2024-04-15 14:48 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-10 22:25 [PATCH] hw/isa/vt82c686: Keep track of PIRQ/PINT pins separately BALATON Zoltan
2024-04-11 9:41 ` Philippe Mathieu-Daudé
2024-04-15 14:47 ` Philippe Mathieu-Daudé [this message]
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