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Mon, 09 Oct 2023 11:59:55 -0700 (PDT) From: To: "'Brian Cain'" , Cc: , , , , "'Matheus Bernardino \(QUIC\)'" , , , , "'Marco Liebel \(QUIC\)'" References: <20231005222206.2784853-1-bcain@quicinc.com> <20231005222206.2784853-4-bcain@quicinc.com> <316e01d9f86e$401f62b0$c05e2810$@gmail.com> In-Reply-To: Subject: RE: [PATCH v2 3/3] target/hexagon: avoid shadowing globals Date: Mon, 9 Oct 2023 12:59:53 -0600 Message-ID: <05d501d9fae2$ca7553e0$5f5ffba0$@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQJv0F5Exw0TPnXaZfUwlO9P/EDe8gDs17xJAQAzRToBfYS0vq76z8dA Content-Language: en-us Received-SPF: pass client-ip=2607:f8b0:4864:20::135; envelope-from=ltaylorsimpson@gmail.com; helo=mail-il1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org > -----Original Message----- > From: Brian Cain > Sent: Sunday, October 8, 2023 7:50 AM > To: ltaylorsimpson@gmail.com; qemu-devel@nongnu.org > Cc: armbru@redhat.com; richard.henderson@linaro.org; = philmd@linaro.org; > peter.maydell@linaro.org; Matheus Bernardino (QUIC) > ; stefanha@redhat.com; ale@rev.ng; > anjo@rev.ng; Marco Liebel (QUIC) > Subject: RE: [PATCH v2 3/3] target/hexagon: avoid shadowing globals >=20 >=20 >=20 > > -----Original Message----- > > From: ltaylorsimpson@gmail.com > > Sent: Friday, October 6, 2023 11:01 AM > > To: Brian Cain ; qemu-devel@nongnu.org > > Cc: armbru@redhat.com; richard.henderson@linaro.org; > > philmd@linaro.org; peter.maydell@linaro.org; Matheus Bernardino = (QUIC) > > ; stefanha@redhat.com; ale@rev.ng; > > anjo@rev.ng; Marco Liebel (QUIC) > > Subject: RE: [PATCH v2 3/3] target/hexagon: avoid shadowing globals > > > > WARNING: This email originated from outside of Qualcomm. Please be > > wary of any links or attachments, and do not enable macros. > > > > > -----Original Message----- > > > From: Brian Cain > > > Sent: Thursday, October 5, 2023 4:22 PM > > > To: qemu-devel@nongnu.org > > > Cc: bcain@quicinc.com; armbru@redhat.com; > > > richard.henderson@linaro.org; philmd@linaro.org; > > > peter.maydell@linaro.org; quic_mathbern@quicinc.com; > > > stefanha@redhat.com; ale@rev.ng; anjo@rev.ng; > > > quic_mliebel@quicinc.com; ltaylorsimpson@gmail.com > > > Subject: [PATCH v2 3/3] target/hexagon: avoid shadowing globals > > > > > > The typedef `vaddr` is shadowed by `vaddr` identifiers, so we = rename > > > the identifiers to avoid shadowing the type name. > > > > > > The global `cpu_env` is shadowed by local `cpu_env` arguments, so = we > > > rename the function arguments to avoid shadowing the global. > > > > > > Signed-off-by: Brian Cain > > > --- > > > target/hexagon/genptr.c | 56 = ++++++++++++------------- > > > target/hexagon/genptr.h | 18 ++++---- > > > target/hexagon/mmvec/system_ext_mmvec.c | 4 +- > > > target/hexagon/mmvec/system_ext_mmvec.h | 2 +- > > > target/hexagon/op_helper.c | 4 +- > > > 5 files changed, 42 insertions(+), 42 deletions(-) > > > > > > diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c = index > > > 217bc7bb5a..11377ac92b 100644 > > > --- a/target/hexagon/genptr.c > > > +++ b/target/hexagon/genptr.c > > > @@ -334,28 +334,28 @@ void gen_set_byte_i64(int N, TCGv_i64 = result, > > TCGv > > > src) > > > tcg_gen_deposit_i64(result, result, src64, N * 8, 8); } > > > > > > -static inline void gen_load_locked4u(TCGv dest, TCGv vaddr, int > > > mem_index) > > > +static inline void gen_load_locked4u(TCGv dest, TCGv v_addr, int > > > +mem_index) > > > > I'd recommend moving both the type and the arg name to the new line, > > also indent the new line. > > static inline void gen_load_locked4u(TCGv dest, TCGv v_addr, > > = int > > mem_index) > > > > > I could be mistaken but AFAICT none of these lines are wrapped in the = way > they're quoted above in my patch (nor the baseline). I don't think = any of > these lines exceed 80 columns, so they shouldn't need wrapping, = either. >=20 > I double checked how it's displayed at the archive > https://lists.gnu.org/archive/html/qemu-devel/2023-10/msg01667.html to > make sure that it wasn't a misconfiguration of my mailer. For another > perspective - refer to the commit used to create this patch: > https://github.com/quic/qemu/commit/7f20565d403d16337ab6d69ee663121 > a3eef71e6 >=20 > Is your review comment that "these lines should be wrapped and when = you > do, make sure you do it like this"? Or "if you are going to wrap = them, wrap > them like this"? Or something else? Yes. It looked like some adding the v_ would sometimes put the line = over the 80 character size. If so, wrap them as described. If not, no wrapping is needed. >=20 > > Otherwise, > > Reviewed-by: Taylor Simpson > >