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From: Richard Henderson <richard.henderson@linaro.org>
To: Git <git@miszr.win>, qemu-devel@nongnu.org
Cc: Artyom Tarasenko <atar4qemu@gmail.com>,
	Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Subject: Re: [PATCH] target/sparc: Fix register selection for the fdtox and fqtox instructions
Date: Tue, 4 Feb 2025 09:43:59 -0800	[thread overview]
Message-ID: <068a42f4-0a11-488b-b41b-017c68906f71@linaro.org> (raw)
In-Reply-To: <653F9E2D-61AE-4954-A161-D1347D1336C5@miszr.win>

On 2/4/25 04:43, Git wrote:
> Thank you Richard for noticing the issue.
> 
> I have been able to create tests that show the malfunction of the FsTOx instruction as 
> well. I am however not yet able to prove(through tests) the malfunction of the FxTO{s,d,q} 
> instructions.

Destination register 32 should be sufficient there.

r~


      reply	other threads:[~2025-02-04 17:44 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-03 14:01 [PATCH] target/sparc: Fix register selection for the fdtox and fqtox instructions Mikael Szreder
2025-02-03 17:12 ` Richard Henderson
2025-02-04 12:43 ` Git
2025-02-04 17:43   ` Richard Henderson [this message]

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