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[88.28.30.160]) by smtp.gmail.com with ESMTPSA id m9-20020a056000008900b00225307f43fbsm2721202wrx.44.2022.12.23.02.14.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Dec 2022 02:14:57 -0800 (PST) Message-ID: <06975360-7efe-ad4b-da65-279c6f0972c1@linaro.org> Date: Fri, 23 Dec 2022 11:14:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH 0/2] hw/intc/arm_gicv3: Bump ITT entry size to 16 Content-Language: en-US To: Alexander Graf , qemu-devel@nongnu.org Cc: Peter Maydell , qemu-arm@nongnu.org, Yanan Wang , Marcel Apfelbaum , Eduardo Habkost , Shashi Mallela , Eric Auger , Neil Armstrong References: <20221223085047.94832-1-agraf@csgraf.de> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20221223085047.94832-1-agraf@csgraf.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.148, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 23/12/22 09:50, Alexander Graf wrote: > While trying to make Windows work with GICv3 emulation, I stumbled over > the fact that it only supports ITT entry sizes that are power of 2 sized. > > While the spec allows arbitrary sizes, in practice hardware will always > expose power of 2 sizes and so this limitation is not really a problem > in real world scenarios. However, we only expose a 12 byte ITT entry size > which makes Windows blue screen on boot. > > The easy way to get around that problem is to bump the size to 16. That > is a power of 2, basically is what hardware would expose given the amount > of bits we need per entry and doesn't break any existing scenarios. To > play it safe, this patch set only bumps them on newer machine types. > > Alexander Graf (2): > hw/intc/arm_gicv3: Make ITT entry size configurable > hw/intc/arm_gicv3: Bump ITT entry size to 16 Series: Reviewed-by: Philippe Mathieu-Daudé