Re: [Qemu-devel] [PATCH] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge

["Cédric Le Goater" <clg@kaod.org>]

On 06/27/2018 12:40 PM, Andrea Bolognani wrote:
> On Wed, 2018-06-27 at 18:41 +1000, Benjamin Herrenschmidt wrote:
>> On Wed, 2018-06-27 at 09:46 +0200, Cédric Le Goater wrote:
>>> So the "IBM PHB3 PCIE Root Port" is already user createable.
>>>
>>> I can take a look at user createable PHB3s. I think this is OK from a model
>>> perspective. The object is rather standalone, it needs the machine for 
>>> the XICS fabric and a couple of ids, phb id and chip id. These can come
>>> from the command line.
>>>
>>> We want at least one PHB3 per socket/chip though. 
>>
>> We don't want the user to specify the SCOM addresses though (for the
>> MMIO windows we should get skiboot to assign them).
>>
>> If the user gets to specify a thing it would be which of the 3 or 4 HW
>> PHBs of the chip it is, the SCOM addresses gets deduced.
> 
> For pSeries guests libvirt will either automatically create, or
> allow users to configure manually, PHBs with something like
> 
>   <controller type='pci' index='1' model='pci-root'>
>     <target index='1'/>
>   </controller>
> 
> which is ultimately converted to
> 
>   -device spapr-pci-host-bridge,index=1,id=pci.1
> 
> Ideally the interface for PowerNV guests can be made to be similar
> if not identical at the libvirt level, without having to add too
> many hacks... It would certainly help a lot if the QEMU interface
> for PowerNV PHBs didn't stray too far from the above.
> 

I think that we will need an extra attribute to specify the chip, but 
only in the case of a multichip system, which is not the common scenario.

So the 'index' attribute should work fine. 

Thanks,

C.