From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42576) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjqg5-0001bh-IA for qemu-devel@nongnu.org; Fri, 03 Mar 2017 12:07:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cjqg4-0008Ib-NC for qemu-devel@nongnu.org; Fri, 03 Mar 2017 12:07:37 -0500 References: <20170302195337.31558-1-alex.bennee@linaro.org> <20170302195337.31558-11-alex.bennee@linaro.org> From: Frederic Konrad Message-ID: <06e77aaf-491e-8345-fbc1-e1027c20252a@greensocs.com> Date: Fri, 3 Mar 2017 18:07:29 +0100 MIME-Version: 1.0 In-Reply-To: <20170302195337.31558-11-alex.bennee@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2 10/11] target/arm/helper: make it clear the EC field is also in hex List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Alex_Benn=c3=a9e?= Cc: peter.maydell@linaro.org, rth@twiddle.net, pbonzini@redhat.com, mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, "open list:ARM" , bobby.prani@gmail.com On 03/02/2017 08:53 PM, Alex Benn=C3=A9e wrote: > ..just like the rest of the displayed ESR register. Otherwise people > might scratch their heads if a not obviously hex number is displayed > for the EC field. >=20 > Signed-off-by: Alex Benn=C3=A9e > --- > target/arm/helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/target/arm/helper.c b/target/arm/helper.c > index 3f4211b572..76b608f0ba 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -6857,7 +6857,7 @@ void arm_cpu_do_interrupt(CPUState *cs) > new_el); > if (qemu_loglevel_mask(CPU_LOG_INT) > && !excp_is_internal(cs->exception_index)) { > - qemu_log_mask(CPU_LOG_INT, "...with ESR %x/0x%" PRIx32 "\n", > + qemu_log_mask(CPU_LOG_INT, "...with ESR 0x%x/0x%" PRIx32 "\n", > env->exception.syndrome >> ARM_EL_EC_SHIFT, > env->exception.syndrome); > } >=20 This seems OK to me. Reviewed-by: KONRAD Frederic