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Mon, 08 Jan 2024 03:02:37 -0800 (PST) Message-ID: <0709ec3c-b217-450f-baac-8774b0dc463c@linaro.org> Date: Mon, 8 Jan 2024 15:02:31 +0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 30/33] target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only Content-Language: en-US To: Richard Henderson , qemu-devel@nongnu.org References: <20240102015808.132373-1-richard.henderson@linaro.org> <20240102015808.132373-31-richard.henderson@linaro.org> From: Pierrick Bouvier In-Reply-To: <20240102015808.132373-31-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::72b; envelope-from=pierrick.bouvier@linaro.org; helo=mail-qk1-x72b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/2/24 05:58, Richard Henderson wrote: > Since aarch64 binaries are generally built for multiple > page sizes, it is trivial to allow the page size to vary. > > Signed-off-by: Richard Henderson > --- > target/arm/cpu-param.h | 6 ++++- > target/arm/cpu.c | 51 ++++++++++++++++++++++++------------------ > 2 files changed, 34 insertions(+), 23 deletions(-) > > diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h > index f9b462a98f..da3243ab21 100644 > --- a/target/arm/cpu-param.h > +++ b/target/arm/cpu-param.h > @@ -19,9 +19,13 @@ > #endif > > #ifdef CONFIG_USER_ONLY > -#define TARGET_PAGE_BITS 12 > # ifdef TARGET_AARCH64 > # define TARGET_TAGGED_ADDRESSES > +/* Allow user-only to vary page size from 4k */ > +# define TARGET_PAGE_BITS_VARY > +# define TARGET_PAGE_BITS_MIN 12 > +# else > +# define TARGET_PAGE_BITS 12 > # endif > #else > /* > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index 650e09b29c..55c2888f2c 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -1788,7 +1788,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) > ARMCPU *cpu = ARM_CPU(dev); > ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev); > CPUARMState *env = &cpu->env; > - int pagebits; > Error *local_err = NULL; > > /* Use pc-relative instructions in system-mode */ > @@ -2079,28 +2078,36 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) > !cpu_isar_feature(aa32_vfp_simd, cpu) || > !arm_feature(env, ARM_FEATURE_XSCALE)); > > - if (arm_feature(env, ARM_FEATURE_V7) && > - !arm_feature(env, ARM_FEATURE_M) && > - !arm_feature(env, ARM_FEATURE_PMSA)) { > - /* v7VMSA drops support for the old ARMv5 tiny pages, so we > - * can use 4K pages. > - */ > - pagebits = 12; > - } else { > - /* For CPUs which might have tiny 1K pages, or which have an > - * MPU and might have small region sizes, stick with 1K pages. > - */ > - pagebits = 10; > - } > - if (!set_preferred_target_page_bits(pagebits)) { > - /* This can only ever happen for hotplugging a CPU, or if > - * the board code incorrectly creates a CPU which it has > - * promised via minimum_page_size that it will not. > - */ > - error_setg(errp, "This CPU requires a smaller page size than the " > - "system is using"); > - return; > +#ifndef CONFIG_USER_ONLY > + { > + int pagebits; > + if (arm_feature(env, ARM_FEATURE_V7) && > + !arm_feature(env, ARM_FEATURE_M) && > + !arm_feature(env, ARM_FEATURE_PMSA)) { > + /* > + * v7VMSA drops support for the old ARMv5 tiny pages, > + * so we can use 4K pages. > + */ > + pagebits = 12; > + } else { > + /* > + * For CPUs which might have tiny 1K pages, or which have an > + * MPU and might have small region sizes, stick with 1K pages. > + */ > + pagebits = 10; > + } > + if (!set_preferred_target_page_bits(pagebits)) { > + /* > + * This can only ever happen for hotplugging a CPU, or if > + * the board code incorrectly creates a CPU which it has > + * promised via minimum_page_size that it will not. > + */ > + error_setg(errp, "This CPU requires a smaller page size " > + "than the system is using"); > + return; > + } > } > +#endif > > /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it. > * We don't support setting cluster ID ([16..23]) (known as Aff2 Reviewed-by: Pierrick Bouvier