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Tue, 04 Jun 2024 06:18:44 -0700 (PDT) Message-ID: <079d6c4f-d02a-4f86-a4bd-96c09bfd8e11@linaro.org> Date: Tue, 4 Jun 2024 15:18:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 08/37] target/sparc: Use gvec for VIS1 parallel add/sub To: Richard Henderson , qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk References: <20240526194254.459395-1-richard.henderson@linaro.org> <20240526194254.459395-9-richard.henderson@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20240526194254.459395-9-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::22f; envelope-from=philmd@linaro.org; helo=mail-lj1-x22f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 26/5/24 21:42, Richard Henderson wrote: > Reviewed-by: Philippe Mathieu-Daudé > Signed-off-by: Richard Henderson > --- > target/sparc/translate.c | 18 ++++++++++++++---- > 1 file changed, 14 insertions(+), 4 deletions(-) > > diff --git a/target/sparc/translate.c b/target/sparc/translate.c > index 362e88de18..8731e4f8bb 100644 > --- a/target/sparc/translate.c > +++ b/target/sparc/translate.c > @@ -4664,6 +4664,20 @@ static bool do_dfd(DisasContext *dc, arg_r_r_r *a, > > TRANS(FMUL8x16, VIS1, do_dfd, a, gen_helper_fmul8x16) > > +static bool do_gvec_ddd(DisasContext *dc, arg_r_r_r *a, MemOp vece, > + void (*func)(unsigned, uint32_t, uint32_t, > + uint32_t, uint32_t, uint32_t)) > +{ I missed the FPU check I guess: if (gen_trap_ifnofpu(dc)) { return true; } > + func(vece, gen_offset_fpr_D(a->rd), gen_offset_fpr_D(a->rs1), > + gen_offset_fpr_D(a->rs2), 8, 8); > + return advance_pc(dc); > +}