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([2602:ae:1541:f901:b714:1fce:85fa:2fc7]) by smtp.gmail.com with ESMTPSA id d17-20020aa78e51000000b006089fb79f1esm2307038pfr.96.2023.03.31.14.39.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 31 Mar 2023 14:39:34 -0700 (PDT) Message-ID: <07f6b2a9-1f07-40f8-13f7-1fd15652e11c@linaro.org> Date: Fri, 31 Mar 2023 14:39:32 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH] riscv: Add support for the Zfa extension Content-Language: en-US To: =?UTF-8?Q?Christoph_M=c3=bcllner?= Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Alistair Francis , Bin Meng , Philipp Tomsich , Palmer Dabbelt , Jeff Law , Tsukasa OI , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei References: <20230327080026.3266574-1-christoph.muellner@vrull.eu> From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/31/23 11:22, Christoph Müllner wrote: > On Mon, Mar 27, 2023 at 7:18 PM Richard Henderson > wrote: >> >> On 3/27/23 01:00, Christoph Muellner wrote: >>> +uint64_t helper_fminm_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) >>> +{ >>> + float32 frs1 = check_nanbox_s(env, rs1); >>> + float32 frs2 = check_nanbox_s(env, rs2); >>> + >>> + if (float32_is_any_nan(frs1) || float32_is_any_nan(frs2)) { >>> + return float32_default_nan(&env->fp_status); >>> + } >>> + >>> + return nanbox_s(env, float32_minimum_number(frs1, frs2, &env->fp_status)); >>> +} >> >> Better to set and clear fp_status->default_nan_mode around the operation. > > I don't see how this can help: > * default_nan_mode defines if the default_nan is generated or if the > operand's NaN should be used > * RISC-V has default_nan_mode always set to true (operations should > return the a canonical NaN and not propagate NaN values) > * That also does not help to eliminate the is_any_nan() tests, because > float*_minimum_number() and float*_minnum() return the non-NaN number > if (only) one operand is NaN > > Am I missing something? Oh goodness, I did mis-read this. But if you need a nan when an input is a nan, then float32_min instead of float32_minimum_number (which goes out of its way to select the non-nan result) is the correct function to use. r~