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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 02/23] target/arm: Correct syndrome for ATS12NSO* at Secure EL1
Date: Fri, 27 Jan 2023 15:04:27 -1000	[thread overview]
Message-ID: <08069c2c-5e15-37b6-4465-cf93e1ce1ddf@linaro.org> (raw)
In-Reply-To: <20230127175507.2895013-3-peter.maydell@linaro.org>

On 1/27/23 07:54, Peter Maydell wrote:
> The AArch32 ATS12NSO* address translation operations are supposed to
> trap to either EL2 or EL3 if they're executed at Secure EL1 (which
> can only happen if EL3 is AArch64).  We implement this, but we got
> the syndrome value wrong: like other traps to EL2 or EL3 on an
> AArch32 cpreg access, they should report the 0x3 syndrome, not the
> 0x0 'uncategorized' syndrome.  This is clear in the access pseudocode
> for these instructions.
> 
> Fix the syndrome value for these operations by correcting the
> returned value from the ats_access() function.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   target/arm/helper.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

> 
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index ccb7d1e1712..6f6772d8e04 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -3284,9 +3284,9 @@ static CPAccessResult ats_access(CPUARMState *env, const ARMCPRegInfo *ri,
>           if (arm_current_el(env) == 1) {
>               if (arm_is_secure_below_el3(env)) {
>                   if (env->cp15.scr_el3 & SCR_EEL2) {
> -                    return CP_ACCESS_TRAP_UNCATEGORIZED_EL2;
> +                    return CP_ACCESS_TRAP_EL2;
>                   }
> -                return CP_ACCESS_TRAP_UNCATEGORIZED_EL3;
> +                return CP_ACCESS_TRAP_EL3;
>               }
>               return CP_ACCESS_TRAP_UNCATEGORIZED;
>           }



  reply	other threads:[~2023-01-28  1:05 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-27 17:54 [PATCH 00/23] target/arm: Implement FEAT_FGT fine-grained traps Peter Maydell
2023-01-27 17:54 ` [PATCH 01/23] target/arm: Name AT_S1E1RP and AT_S1E1WP cpregs correctly Peter Maydell
2023-01-28  1:01   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 02/23] target/arm: Correct syndrome for ATS12NSO* at Secure EL1 Peter Maydell
2023-01-28  1:04   ` Richard Henderson [this message]
2023-01-27 17:54 ` [PATCH 03/23] target/arm: Remove CP_ACCESS_TRAP_UNCATEGORIZED_{EL2, EL3} Peter Maydell
2023-01-28  1:11   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 04/23] target/arm: Move do_coproc_insn() syndrome calculation earlier Peter Maydell
2023-01-28  1:13   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 05/23] target/arm: All UNDEF-at-EL0 traps take priority over HSTR_EL2 traps Peter Maydell
2023-01-28  1:24   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 06/23] target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1 Peter Maydell
2023-01-28  1:47   ` Richard Henderson
2023-01-28 14:34     ` Peter Maydell
2023-01-27 17:54 ` [PATCH 07/23] target/arm: Disable HSTR_EL2 traps if EL2 is not enabled Peter Maydell
2023-01-28  1:51   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 08/23] target/arm: Define the FEAT_FGT registers Peter Maydell
2023-01-28  2:31   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 09/23] target/arm: Implement FGT trapping infrastructure Peter Maydell
2023-01-28  2:36   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 10/23] target/arm: Mark up sysregs for HFGRTR bits 0..11 Peter Maydell
2023-01-28  2:36   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 11/23] target/arm: Mark up sysregs for HFGRTR bits 12..23 Peter Maydell
2023-01-28  2:41   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 12/23] target/arm: Mark up sysregs for HFGRTR bits 24..35 Peter Maydell
2023-01-28  2:43   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 13/23] target/arm: Mark up sysregs for HFGRTR bits 36..63 Peter Maydell
2023-01-28  2:50   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 14/23] target/arm: Mark up sysregs for HDFGRTR bits 0..11 Peter Maydell
2023-01-28  2:52   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 15/23] target/arm: Mark up sysregs for HDFGRTR bits 12..63 Peter Maydell
2023-01-28 23:44   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 16/23] target/arm: Mark up sysregs for HFGITR bits 0..11 Peter Maydell
2023-01-28 23:47   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 17/23] target/arm: Mark up sysregs for HFGITR bits 12..17 Peter Maydell
2023-01-28 23:47   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 18/23] target/arm: Mark up sysregs for HFGITR bits 18..47 Peter Maydell
2023-01-28 23:49   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 19/23] target/arm: Mark up sysregs for HFGITR bits 48..63 Peter Maydell
2023-01-28 23:50   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 20/23] target/arm: Implement the HFGITR_EL2.ERET trap Peter Maydell
2023-01-28 23:53   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 21/23] target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 traps Peter Maydell
2023-01-28 23:58   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 22/23] target/arm: Implement MDCR_EL2.TDCC and MDCR_EL3.TDCC traps Peter Maydell
2023-01-29  0:06   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 23/23] target/arm: Enable FEAT_FGT on '-cpu max' Peter Maydell
2023-01-29  0:07   ` Richard Henderson
2023-01-27 18:43 ` [PATCH 00/23] target/arm: Implement FEAT_FGT fine-grained traps Peter Maydell

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