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Wed, 17 Jun 2020 15:57:18 +0000 (UTC) Subject: Re: ovmf / PCI passthrough impaired due to very limiting PCI64 aperture To: Guilherme Piccoli References: <99779e9c-f05f-501b-b4be-ff719f140a88@canonical.com> <20200616165043.24y2cp53axk7uggy@sirius.home.kraxel.org> <20200616165746.GH2788@work-vm> From: Laszlo Ersek Message-ID: <084e2640-d71e-d4ec-efdd-3f7947a6b511@redhat.com> Date: Wed, 17 Jun 2020 17:57:17 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Firefox/52.0 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=207.211.31.120; envelope-from=lersek@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/17 01:42:04 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pedro Principeza , ehabkost@redhat.com, Dann Frazier , qemu-devel@nongnu.org, Christian Ehrhardt , "Dr. David Alan Gilbert" , Gerd Hoffmann , fw@gpiccoli.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 06/17/20 15:43, Guilherme Piccoli wrote: > So, the only problem with that refactor you're proposing is the > retrocompatibility with qemu versions, as I can anticipate cases in > which newer OVMF runs with older qemu, which does not provide such > trustworth physbits info. I don't necessarily see compat issues -- large-BAR PCI device assignment might simply stop working under those circumstances, because you could no longer use X-PciMmio64Mb, and the new way wouldn't be supported by (old) QEMU. This would indeed be a regression relative to "X-PciMmio64Mb", but that's exactly why there's an "X" in "X-PciMmio64Mb". > So, the code may be a bit complex, it'll > need to take into account this case (probably we could just rely on > the physbits "detected" by OVMF in such case, limiting PCI64 aperture > to the current 36-bits, right?). A "bit complex" is an understatement. The code is already much more complex than it should be. (And I do think that's an inherent, not accidental, complexity; it reflects the situation.) Once we have a new design, we should do the bare minimum to keep such previous usage functional that's *not* reliant on X-PciMmio64Mb. Laszlo