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Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.4.1 Subject: Re: [PATCH] hw/sd/sdhci: reset data count in sdhci_buff_access_is_sequential() Content-Language: en-US To: Mauro Matteo Cascella , qemu-devel@nongnu.org, bin.meng@windriver.com Cc: XRivenDell@outlook.com, coc.cyqh@gmail.com, ningqiang1@huawei.com References: <20221107103510.34588-1-mcascell@redhat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20221107103510.34588-1-mcascell@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 7/11/22 11:35, Mauro Matteo Cascella wrote: > Make sure to reset data_count if it's equal to (or exceeds) block_size. > This prevents an off-by-one read / write when accessing s->fifo_buffer > in sdhci_read_dataport / sdhci_write_dataport, both called right after > sdhci_buff_access_is_sequential. > > Fixes: CVE-2022-3872 > Reported-by: RivenDell > Reported-by: Siqi Chen > Reported-by: ningqiang > Signed-off-by: Mauro Matteo Cascella > --- > hw/sd/sdhci.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c > index 306070c872..aa2fd79df2 100644 > --- a/hw/sd/sdhci.c > +++ b/hw/sd/sdhci.c > @@ -978,6 +978,10 @@ static bool sdhci_can_issue_command(SDHCIState *s) > static inline bool > sdhci_buff_access_is_sequential(SDHCIState *s, unsigned byte_num) > { > + if (s->data_count >= (s->blksize & BLOCK_SIZE_MASK)) { > + s->data_count = 0; > + } You avoid an off-by-one but now the model doesn't work per the spec. Not really what the best fix IMHO. > if ((s->data_count & 0x3) != byte_num) { > trace_sdhci_error("Non-sequential access to Buffer Data Port register" > "is prohibited\n"); I wonder why sdhci_data_transfer() indiscriminately sets SDHC_SPACE_AVAILABLE in the write path (at least without clearing the FIFO first). The fix could be: -- >8 -- diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c @@ -955,5 +955,5 @@ static void sdhci_data_transfer(void *opaque) } else { s->prnsts |= SDHC_DOING_WRITE | SDHC_DAT_LINE_ACTIVE | - SDHC_SPACE_AVAILABLE | SDHC_DATA_INHIBIT; + SDHC_DATA_INHIBIT; sdhci_write_block_to_card(s); } --- Bin, what do you think? Regards, Phil.