From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>, QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH v1 11/11] target/arm: Enable BFloat16 extensions
Date: Tue, 18 May 2021 09:47:47 -0500 [thread overview]
Message-ID: <0882a45d-8c02-93fb-2dff-abdc7f7c6b95@linaro.org> (raw)
In-Reply-To: <CAFEAcA_YZe6xMfMFek-KEh8j3zO-AiquM3epyFET3R6XPDAjkQ@mail.gmail.com>
On 5/18/21 7:47 AM, Peter Maydell wrote:
>> diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
>> index 046e476f65..b2463cf109 100644
>> --- a/target/arm/cpu_tcg.c
>> +++ b/target/arm/cpu_tcg.c
>> @@ -968,6 +968,7 @@ static void arm_max_initfn(Object *obj)
>> t = FIELD_DP32(t, ID_ISAR6, FHM, 1);
>> t = FIELD_DP32(t, ID_ISAR6, SB, 1);
>> t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1);
>> + t = FIELD_DP32(t, ID_ISAR6, BF16, 1);
>> cpu->isar.id_isar6 = t;
>>
>> t = cpu->isar.mvfr1;
>
> Same query as with SVE: do we need to clear these in the "!has_vfp"
> and "!has_neon" handling code in arm_cpu_realizefn() ?
I *think* we want to clear ID_ISAR6 only when !has_vfp && !has_neon, as
FEAT_AA32BF16 should still be usable to the other one. Which also means adding
the NEON/VFP check you suggested.
r~
next prev parent reply other threads:[~2021-05-18 15:10 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-16 23:59 [PATCH v1 for-6.1 00/11] target/arm: Implement BFloat16 Richard Henderson
2021-04-16 23:59 ` [PATCH v1 01/11] target/arm: Add isar_feature_{aa32, aa64, aa64_sve}_bf16 Richard Henderson
2021-05-18 10:43 ` Peter Maydell
2021-04-16 23:59 ` [PATCH v1 02/11] target/arm: Unify unallocated path in disas_fp_1src Richard Henderson
2021-05-18 10:43 ` Peter Maydell
2021-04-16 23:59 ` [PATCH v1 03/11] target/arm: Implement scalar float32 to bfloat16 conversion Richard Henderson
2021-05-18 10:53 ` Peter Maydell
2021-04-16 23:59 ` [PATCH v1 04/11] target/arm: Implement vector " Richard Henderson
2021-05-18 11:10 ` Peter Maydell
2021-05-18 14:32 ` Richard Henderson
2021-04-16 23:59 ` [PATCH v1 05/11] fpu: Add float_round_to_odd_inf Richard Henderson
2021-05-18 11:20 ` Peter Maydell
2021-05-18 14:24 ` Richard Henderson
2021-04-16 23:59 ` [PATCH v1 06/11] target/arm: Implement bfloat16 dot product (vector) Richard Henderson
2021-05-18 12:15 ` Peter Maydell
2021-05-18 14:27 ` Richard Henderson
2021-04-16 23:59 ` [PATCH v1 07/11] target/arm: Implement bfloat16 dot product (indexed) Richard Henderson
2021-05-18 12:24 ` Peter Maydell
2021-05-18 14:38 ` Richard Henderson
2021-04-16 23:59 ` [PATCH v1 08/11] target/arm: Implement bfloat16 matrix multiply accumulate Richard Henderson
2021-05-18 12:37 ` Peter Maydell
2021-05-18 14:45 ` Richard Henderson
2021-04-16 23:59 ` [PATCH v1 09/11] target/arm: Implement bfloat widening fma (vector) Richard Henderson
2021-05-18 12:42 ` Peter Maydell
2021-04-16 23:59 ` [PATCH v1 10/11] target/arm: Implement bfloat widening fma (indexed) Richard Henderson
2021-05-18 12:46 ` Peter Maydell
2021-04-16 23:59 ` [PATCH v1 11/11] target/arm: Enable BFloat16 extensions Richard Henderson
2021-05-18 12:47 ` Peter Maydell
2021-05-18 14:47 ` Richard Henderson [this message]
2021-05-25 16:57 ` Richard Henderson
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