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([2001:8003:e5b0:9f00:dbbc:1945:6e65:ec5]) by smtp.gmail.com with ESMTPSA id s24-20020a17090aba1800b0026302348ee4sm11911677pjr.30.2023.07.13.05.43.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 13 Jul 2023 05:43:03 -0700 (PDT) Message-ID: <08a313fd-ddf8-538d-df51-03e28aee0d97@redhat.com> Date: Thu, 13 Jul 2023 22:42:57 +1000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH 0/3] hw/arm/virt: Use generic CPU invalidation Content-Language: en-US To: Peter Maydell Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, pbonzini@redhat.com, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, wangyanan55@huawei.com, shan.gavin@gmail.com References: <20230713054502.410911-1-gshan@redhat.com> From: Gavin Shan In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.096, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Peter, On 7/13/23 21:44, Peter Maydell wrote: > On Thu, 13 Jul 2023 at 06:45, Gavin Shan wrote: >> >> There is a generic CPU type invalidation in machine_run_board_init() >> and we needn't a same and private invalidation for hw/arm/virt machines. >> This series intends to use the generic CPU type invalidation on the >> hw/arm/virt machines. >> >> PATCH[1] factors the CPU type invalidation logic in machine_run_board_init() >> to a helper validate_cpu_type(). >> PATCH[2] uses the generic CPU type invalidation for hw/arm/virt machines >> PATCH[3] support "host-arm-cpu" CPU type only when KVM or HVF is visible >> >> Testing >> ======= >> >> With the following command lines, the output messages are varied before >> and after the series is applied. >> >> /home/gshan/sandbox/src/qemu/main/build/qemu-system-aarch64 \ >> -accel tcg -machine virt,gic-version=3,nvdimm=on \ >> -cpu cortex-a8 -smp maxcpus=2,cpus=1 \ >> : >> >> Before the series is applied: >> >> qemu-system-aarch64: mach-virt: CPU type cortex-a8-arm-cpu not supported >> >> After the series is applied: >> >> qemu-system-aarch64: Invalid CPU type: cortex-a8-arm-cpu >> The valid types are: cortex-a7-arm-cpu, cortex-a15-arm-cpu, \ >> cortex-a35-arm-cpu, cortex-a55-arm-cpu, cortex-a72-arm-cpu, \ >> cortex-a76-arm-cpu, a64fx-arm-cpu, neoverse-n1-arm-cpu, \ >> neoverse-v1-arm-cpu, cortex-a53-arm-cpu, cortex-a57-arm-cpu, \ >> max-arm-cpu > > I see this isn't a change in this patch, but given that > what the user specifies is not "cortex-a8-arm-cpu" but > "cortex-a8", why do we include the "-arm-cpu" suffix in > the error messages? It's not valid syntax to say > "-cpu cortex-a8-arm-cpu", so it's a bit misleading... > Good point. Right, the complete CPU type names are provided by board (hw/arm/virt). The compelte CPU type names are used in hw/core/machine.c to search the object class. In the error messages in the same source file, the complete CPU type names are also used. Actually, we need 'internal' names like 'cortex-a8' to be shown in the error messages. For the solution, I've suggested to split the MachineClass::valid_cpu_types to two fields (valid_cpu_types and valid_cpu_type_suffix). Their combination is the complete CPU type name and 'valid_cpu_types[i]' corresponds to the 'internal' name, to be used in the error messages. Please take a look on that thread and reply to it. Thanks, Gavin