Re: Denormal input handling

[Richard Henderson <richard.henderson@linaro.org>]

On 6/21/21 4:13 PM, Michael Morrell wrote:
> I have another couple of thoughts around input denormal handling.
> 
> The first is straightforward.  I noticed that the Aarch64 port doesn't report input 
> denormals (I could not find any code which sets the IDC bit in the FPSR).  I found code in 
> the arm (not aarch64) port that sets other bits like IXC, but nothing for IDC.   Is that 
> simply because no one has bothered to add this support?

It's because we failed to use symbolic constants.  See vfp_exceptbits_from_host.  Which 
*is* used for both aarch64 and arm.


> The second concerns support for cases where multiple exception conditions occur.   I had 
> originally thought that denormal input handling would be orthogonal to everything else and 
> so a case like "sNaN  + denorm" would set both the invalid and input denormal flags or 
> "denorm / 0" would set both idivde by zero and input denormal, but I don't think that is 
> true for at least some architectures.  Perhaps some specialization is needed here?

If you've got a specific example, we can look at it.  There's no point adding 
specialization that isn't going to be used.


r~