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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id x2-20020a170902fe8200b001d947e65ad8sm8507278plm.251.2024.02.21.12.41.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Feb 2024 12:41:11 -0800 (PST) Message-ID: <0911d6a4-7fd6-4d0f-83a8-ec4ba8420297@linaro.org> Date: Wed, 21 Feb 2024 10:41:07 -1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v2 04/22] target/arm: Implement ALLINT MSR (immediate) Content-Language: en-US From: Richard Henderson To: Jinjie Ruan , peter.maydell@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, wangyanan55@huawei.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org References: <20240221130823.677762-1-ruanjinjie@huawei.com> <20240221130823.677762-5-ruanjinjie@huawei.com> <9fb9c74e-e4d3-4a8b-b736-c8603414245c@linaro.org> In-Reply-To: <9fb9c74e-e4d3-4a8b-b736-c8603414245c@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2/21/24 09:09, Richard Henderson wrote: > On 2/21/24 03:08, Jinjie Ruan via wrote: >> Add ALLINT MSR (immediate) to decodetree. And the EL0 check is necessary >> to ALLINT. Avoid the unconditional write to pc and use raise_exception_ra >> to unwind. >> >> Signed-off-by: Jinjie Ruan >> --- >>   target/arm/tcg/a64.decode      |  1 + >>   target/arm/tcg/helper-a64.c    | 24 ++++++++++++++++++++++++ >>   target/arm/tcg/helper-a64.h    |  1 + >>   target/arm/tcg/translate-a64.c | 10 ++++++++++ >>   4 files changed, 36 insertions(+) >> >> diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode >> index 8a20dce3c8..3588080024 100644 >> --- a/target/arm/tcg/a64.decode >> +++ b/target/arm/tcg/a64.decode >> @@ -207,6 +207,7 @@ MSR_i_DIT       1101 0101 0000 0 011 0100 .... 010 11111 @msr_i >>   MSR_i_TCO       1101 0101 0000 0 011 0100 .... 100 11111 @msr_i >>   MSR_i_DAIFSET   1101 0101 0000 0 011 0100 .... 110 11111 @msr_i >>   MSR_i_DAIFCLEAR 1101 0101 0000 0 011 0100 .... 111 11111 @msr_i >> +MSR_i_ALLINT    1101 0101 0000 0 001 0100 .... 000 11111 @msr_i >>   MSR_i_SVCR      1101 0101 0000 0 011 0100 0 mask:2 imm:1 011 11111 >>   # MRS, MSR (register), SYS, SYSL. These are all essentially the >> diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c >> index ebaa7f00df..3686926ada 100644 >> --- a/target/arm/tcg/helper-a64.c >> +++ b/target/arm/tcg/helper-a64.c >> @@ -66,6 +66,30 @@ void HELPER(msr_i_spsel)(CPUARMState *env, uint32_t imm) >>       update_spsel(env, imm); >>   } >> +static void allint_check(CPUARMState *env, uint32_t op, >> +                       uint32_t imm, uintptr_t ra) >> +{ >> +    /* ALLINT update to PSTATE. */ >> +    if (arm_current_el(env) == 0) { >> +        raise_exception_ra(env, EXCP_UDEF, >> +                           syn_aa64_sysregtrap(0, extract32(op, 0, 3), >> +                                               extract32(op, 3, 3), 4, >> +                                               imm, 0x1f, 0), >> +                           exception_target_el(env), ra); >> +    } >> +} > > A runtime check for EL0 is not necessary; you've already handled that in > trans_MSR_i_ALLINT().  However, what *is* missing here is the test against TALLINT for EL1. > >> + >> +void HELPER(msr_i_allint)(CPUARMState *env, uint32_t imm) >> +{ >> +    allint_check(env, 0x8, imm, GETPC()); >> +    if (imm == 1) { >> +        env->allint |= PSTATE_ALLINT; >> +    } else { >> +        env->allint &= ~PSTATE_ALLINT; >> +    } > > I think you should not write an immediate-specific helper, but one which can also handle > the variable "MSR allint, ".  This is no more difficult than > > void HELPER(msr_allint)(CPUARMState *env, target_ulong val) > { >     ... check ... >     env->pstate = (env->pstate & ~PSTATE_ALLINT) | (val & PSTATE_ALLINT); > } Ho hum.. I just noticed that TALLINT only traps immediate write of 1, not also immediate write of 0. So one helper for both MSR Xt and MSR imm is not practical. r~