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[77.188.8.186]) by smtp.gmail.com with ESMTPSA id ay14-20020a05600c1e0e00b00412a589d446sm4090230wmb.5.2024.02.26.14.44.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 26 Feb 2024 14:44:55 -0800 (PST) Date: Mon, 26 Feb 2024 22:44:54 +0000 From: Bernhard Beschow To: =?ISO-8859-1?Q?Philippe_Mathieu-Daud=E9?= , qemu-devel@nongnu.org CC: Laurent Vivier , Thomas Huth , BALATON Zoltan , Ani Sinha , qemu-block@nongnu.org, Marcel Apfelbaum , Eduardo Habkost , John Snow , Paolo Bonzini , "Michael S. Tsirkin" , Igor Mammedov , Richard Henderson , Mark Cave-Ayland Subject: Re: [PATCH v2 00/15] hw/southbridge: Extract ICH9 QOM container model In-Reply-To: <20240226111416.39217-1-philmd@linaro.org> References: <20240226111416.39217-1-philmd@linaro.org> Message-ID: <091FBE60-DC3C-4B59-A6E1-DD2C7174D3A2@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=shentey@gmail.com; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Am 26=2E Februar 2024 11:13:59 UTC schrieb "Philippe Mathieu-Daud=C3=A9" <= philmd@linaro=2Eorg>: >Since v1 [1]: >- Rebased on top of Bernhard patches >- Rename files with 'ich9_' prefix (Bernhard) > >Hi, > >I have a long standing southbridge QOM rework branches=2E Since >Bernhard is actively working on the PIIX, I'll try to refresh >and post=2E This is also motivated by the Dynamic Machine work >where we are trying to figure the ideal DSL for QEMU, so having >complex models well designed help=2E > >Here we introduce the ICH9 'southbridge' as a QOM container=2E >Since the chipset comes as a whole, we shouldn't instantiate >its components separately=2E However in order to maintain old >code we expose some properties to configure the container and >not introduce any change for the Q35 machine=2E There is no >migration change, only QOM objects moved around=2E I really like the simplicity of the machine code and that the ICH9 southbr= idge becomes a proper device rather than being scattered around in machine = code=2E I've made some reviews in form of a branch: https://github=2Ecom/sh= entok/qemu/commits/philmd/ich9_qom-v2/ > >More work remain in the LPC function (more code to remove from >Q35)=2E Maybe worth doing in parallel with the PIIX to clean both >PC machines=2E Would be nice if the pattern could then also be applied to the VIA southbr= idges, otherwise this could break my via-apollo-pro-133t branch: https://gi= thub=2Ecom/shentok/qemu/tree/via-apollo-pro-133t Best regards, Bernhard > >Also we'd need to decouple the cpu_interrupt() calls between hw/ >and target/=2E > >Note that GSI is currently broken [2]=2E Once the LPC/ISA part is >done, it might be easier to fix it=2E > >[1] https://lore=2Ekernel=2Eorg/qemu-devel/20240219163855=2E87326-1-philm= d@linaro=2Eorg/ >[2] https://lore=2Ekernel=2Eorg/qemu-devel/cd0e13c6-c03d-411f-83a5-1d4d28= ea4345@linaro=2Eorg/ > >Philippe Mathieu-Daud=C3=A9 (15): > MAINTAINERS: Add 'ICH9 South Bridge' section > hw/i386/q35: Add local 'lpc_obj' variable > hw/acpi/ich9: Restrict definitions from 'hw/southbridge/ich9=2Eh' > hw/acpi/ich9_tco: Include 'ich9' in names > hw/acpi/ich9_tco: Restrict ich9_generate_smi() declaration > hw/ide: Rename ich=2Ec -> ich9_ahci=2Ec > hw/i2c/smbus: Extract QOM ICH9 definitions to 'ich9_smbus=2Eh' > hw/pci-bridge: Extract QOM ICH definitions to 'ich9_dmi=2Eh' > hw/southbridge/ich9: Introduce TYPE_ICH9_SOUTHBRIDGE stub > hw/southbridge/ich9: Add the DMI-to-PCI bridge > hw/southbridge/ich9: Add a AHCI function > hw/southbridge/ich9: Add the SMBus function > hw/southbridge/ich9: Add the USB EHCI/UHCI functions > hw/southbridge/ich9: Extract LPC definitions to 'hw/isa/ich9_lpc=2Eh' > hw/southbridge/ich9: Add the LPC / ISA bridge function > > MAINTAINERS | 21 +- > include/hw/acpi/ich9=2Eh | 15 ++ > include/hw/acpi/ich9_tco=2Eh | 6 +- > include/hw/i2c/ich9_smbus=2Eh | 25 +++ > include/hw/isa/ich9_lpc=2Eh | 166 +++++++++++++++ > include/hw/pci-bridge/ich9_dmi=2Eh | 20 ++ > include/hw/southbridge/ich9=2Eh | 235 +--------------------- > hw/acpi/ich9=2Ec | 9 +- > hw/acpi/ich9_tco=2Ec | 5 +- > hw/i2c/{smbus_ich9=2Ec =3D> ich9_smbus=2Ec} | 36 +++- > hw/i386/acpi-build=2Ec | 1 + > hw/i386/pc_q35=2Ec | 126 +++--------- > hw/ide/{ich=2Ec =3D> ich9_ahci=2Ec} | 0 > hw/isa/{lpc_ich9=2Ec =3D> ich9_lpc=2Ec} | 37 +++- > hw/pci-bridge/{i82801b11=2Ec =3D> ich9_dmi=2Ec} | 11 +- > hw/southbridge/ich9=2Ec | 213 ++++++++++++++++++++ > tests/qtest/tco-test=2Ec | 2 +- > hw/Kconfig | 1 + > hw/i2c/meson=2Ebuild | 2 +- > hw/i386/Kconfig | 3 +- > hw/ide/meson=2Ebuild | 2 +- > hw/isa/meson=2Ebuild | 2 +- > hw/meson=2Ebuild | 1 + > hw/pci-bridge/meson=2Ebuild | 2 +- > hw/southbridge/Kconfig | 11 + > hw/southbridge/meson=2Ebuild | 3 + > 26 files changed, 587 insertions(+), 368 deletions(-) > create mode 100644 include/hw/i2c/ich9_smbus=2Eh > create mode 100644 include/hw/isa/ich9_lpc=2Eh > create mode 100644 include/hw/pci-bridge/ich9_dmi=2Eh > rename hw/i2c/{smbus_ich9=2Ec =3D> ich9_smbus=2Ec} (77%) > rename hw/ide/{ich=2Ec =3D> ich9_ahci=2Ec} (100%) > rename hw/isa/{lpc_ich9=2Ec =3D> ich9_lpc=2Ec} (95%) > rename hw/pci-bridge/{i82801b11=2Ec =3D> ich9_dmi=2Ec} (95%) > create mode 100644 hw/southbridge/ich9=2Ec > create mode 100644 hw/southbridge/Kconfig > create mode 100644 hw/southbridge/meson=2Ebuild >