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[90.26.70.43]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47763db453csm121669635e9.1.2025.11.10.06.58.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 10 Nov 2025 06:58:27 -0800 (PST) Message-ID: <09d88466-8ba6-4548-b2d4-dded9bed37b9@linaro.org> Date: Mon, 10 Nov 2025 15:58:26 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 08/12] hw/arm/aspeed_ast10x0: Add AST1060 SoC support Content-Language: en-US To: Jamin Lin , =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , Joel Stanley , Alistair Francis , Kevin Wolf , Hanna Reitz , "open list:ASPEED BMCs" , "open list:All patches CC here" , "open list:Block layer core" Cc: troy_lee@aspeedtech.com, kane_chen@aspeedtech.com References: <20251106084925.1253704-1-jamin_lin@aspeedtech.com> <20251106084925.1253704-9-jamin_lin@aspeedtech.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20251106084925.1253704-9-jamin_lin@aspeedtech.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/11/25 09:49, Jamin Lin via wrote: > Add initial support for the Aspeed AST1060 SoC. The AST1060 reuses most > of the AST1030 peripheral device models, as the two SoCs share nearly > the same controllers including WDT, SCU, TIMER, HACE, ADC, I2C, FMC, > and SPI. > > A new common initialization and realization framework (ast10x0_init > and ast10x0_realize) is leveraged so AST1060 can instantiate the > existing AST1030 models without redefining duplicate device types. > > Signed-off-by: Jamin Lin > --- > hw/arm/aspeed_ast10x0.c | 61 ++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 60 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c > index c85c21b149..17f5285d85 100644 > --- a/hw/arm/aspeed_ast10x0.c > +++ b/hw/arm/aspeed_ast10x0.c > @@ -190,6 +190,25 @@ static void aspeed_soc_ast1030_init(Object *obj) > object_initialize_child(obj, "peci", &s->peci, TYPE_ASPEED_PECI); > } > > +static void aspeed_soc_ast1060_init(Object *obj) > +{ > + char socname[8] = "ast1030"; > + > + /* > + * The AST1060 SoC reuses the AST1030 device models. Since all peripheral > + * models (e.g. WDT, SCU, TIMER, HACE, ADC, I2C, FMC, SPI) defined for > + * AST1030 are compatible with AST1060, we simply reuse the existing > + * AST1030 models for AST1060. > + * > + * To simplify the implementation, AST1060 sets its socname to that of > + * AST1030, avoiding the need to create a full set of new > + * TYPE_ASPEED_1060_XXX device definitions. This allows the same > + * TYPE_ASPEED_1030_WDT and other models to be instantiated for both > + * SoCs. > + */ > + aspeed_soc_ast10x0_init(obj, socname); Why not simply use: aspeed_soc_ast10x0_init(obj, "ast1030"); ? > +}