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From: "Cédric Le Goater" <clg@kaod.org>
To: Balamuruhan S <bala24@linux.ibm.com>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: maddy@linux.vnet.ibm.com, anju@linux.vnet.ibm.com,
	groug@kaod.org, hari@linux.vnet.ibm.com,
	david@gibson.dropbear.id.au
Subject: Re: [Qemu-devel] [PATCH v1 0/3] add Homer/OCC common area emulation for PowerNV
Date: Tue, 10 Sep 2019 13:45:55 +0200	[thread overview]
Message-ID: <0a76efcd-127c-75a4-8fc8-92007ccec1a5@kaod.org> (raw)
In-Reply-To: <20190910071019.16689-1-bala24@linux.ibm.com>

On 10/09/2019 09:10, Balamuruhan S wrote:
> Hi All,
> 
> This is follow-up patch that implements HOMER and OCC SRAM device
> models to emulate homer memory and occ common area access for pstate
> table, occ sensors, runtime data and slw.
> 
> This version addresses review comments in previous patchset and
> breaks it to have separate patch series for Homer and OCC emulation,
> 
> https://lists.gnu.org/archive/html/qemu-devel/2019-08/msg00979.html
> 
> currently skiboot disables the homer/occ code path with `QUIRK_NO_PBA`,
> this quirk have to be removed in skiboot for it to use HOMER and OCC
> SRAM device models along with few bug fixes,
> 
> https://github.com/balamuruhans/skiboot/commit/a655514d2a730e0372a2faee277d1cf01f71a524
> https://github.com/balamuruhans/skiboot/commit/fd3d93d92ec66a7494346d6d24ced7b48264c9a0

Can't we generate the sensors in QEMU ? I am not sure what this
patch does. Is the Header Block invalid ? 

It would be good to generate properties to control their values 
on the monitor line, like Rashmica did for GPIO model in the 
Aspeed machine.

> https://github.com/balamuruhans/skiboot/commit/165b3829a93bc177c18133945a8cca3a2d701173

This one is weird .

C. 

> 
> changes from v1:
>     * reuse PnvOCC device model to implement SRAM device.
>     * implement PnvHomer as separate device model.
>     * have core max base address as part of PnvHOMERClass.
>     * reuse PNV_CHIP_INDEX() instead of introducing new `chip_num`.
>     * define all the memory ops access address as macros.
>     * few coding style warnings given by checkpatch.pl.
> 
> I request for review, comments and suggestions for the changes.
> 
> Balamuruhan S (3):
>   hw/ppc/pnv_xscom: retrieve homer/occ base address from PBA BARs
>   hw/ppc/pnv_occ: add sram device model for occ common area
>   hw/ppc/pnv_homer: add PowerNV homer device model
> 
>  hw/ppc/Makefile.objs       |   1 +
>  hw/ppc/pnv.c               |  87 ++++++++++++---
>  hw/ppc/pnv_homer.c         | 258 +++++++++++++++++++++++++++++++++++++++++++++
>  hw/ppc/pnv_occ.c           |  78 ++++++++++++++
>  hw/ppc/pnv_xscom.c         |  34 +++++-
>  include/hw/ppc/pnv.h       |  21 ++++
>  include/hw/ppc/pnv_homer.h |  52 +++++++++
>  include/hw/ppc/pnv_occ.h   |   3 +
>  8 files changed, 513 insertions(+), 21 deletions(-)
>  create mode 100644 hw/ppc/pnv_homer.c
>  create mode 100644 include/hw/ppc/pnv_homer.h
> 



  parent reply	other threads:[~2019-09-10 11:50 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-10  7:10 [Qemu-devel] [PATCH v1 0/3] add Homer/OCC common area emulation for PowerNV Balamuruhan S
2019-09-10  7:10 ` [Qemu-devel] [PATCH v1 1/3] hw/ppc/pnv_xscom: retrieve homer/occ base address from PBA BARs Balamuruhan S
2019-09-10  7:16   ` Cédric Le Goater
2019-09-10  7:10 ` [Qemu-devel] [PATCH v1 2/3] hw/ppc/pnv_occ: add sram device model for occ common area Balamuruhan S
2019-09-10  7:19   ` Cédric Le Goater
2019-09-10  9:31     ` Balamuruhan S
2019-09-10  9:33       ` Cédric Le Goater
2019-09-10  7:10 ` [Qemu-devel] [PATCH v1 3/3] hw/ppc/pnv_homer: add PowerNV homer device model Balamuruhan S
2019-09-10  7:46   ` Cédric Le Goater
2019-09-10 10:30     ` Balamuruhan S
2019-09-10 11:00       ` Cédric Le Goater
2019-09-10 14:55         ` Balamuruhan S
2019-09-11  0:34   ` David Gibson
2019-09-11  4:47     ` Balamuruhan S
2019-09-10 11:45 ` Cédric Le Goater [this message]
2019-09-10 14:40   ` [Qemu-devel] [PATCH v1 0/3] add Homer/OCC common area emulation for PowerNV Balamuruhan S

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