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[216.228.167.147]) by smtp.gmail.com with ESMTPSA id b185sm15999003pfg.71.2020.08.25.11.06.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 25 Aug 2020 11:06:42 -0700 (PDT) Subject: Re: [PATCH 02/22] target/arm: Use correct ID register check for aa32_fp16_arith To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20200824142934.20850-1-peter.maydell@linaro.org> <20200824142934.20850-3-peter.maydell@linaro.org> From: Richard Henderson Message-ID: <0a7f9574-2d82-9c32-ca37-e5fad0e9bb42@linaro.org> Date: Tue, 25 Aug 2020 11:06:40 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200824142934.20850-3-peter.maydell@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1042; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1042.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -46 X-Spam_score: -4.7 X-Spam_bar: ---- X-Spam_report: (-4.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-2.602, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/24/20 7:29 AM, Peter Maydell wrote: > The aa32_fp16_arith feature check function currently looks at the > AArch64 ID_AA64PFR0 register. This is (as the comment notes) not > correct. The bogus check was put in mostly to allow testing of the > fp16 variants of the VCMLA instructions and it was something of > a mistake that we allowed them to exist in master. > > Switch the feature check function to testing VMFR1.FPHP, which is > what it ought to be. > > This will remove emulation of the VCMLA and VCADD insns from > AArch32 code running on an AArch64 '-cpu max' using system emulation. > (They were never enabled for aarch32 linux-user and system-emulation.) > Since we weren't advertising their existence via the AArch32 ID > register, well-behaved guests wouldn't have been using them anyway. > > Once we have implemented all the AArch32 support for the FP16 extension > we will advertise it in the MVFR1 ID register field, which will reenable > these insns along with all the others. > > Signed-off-by: Peter Maydell > --- > I don't expect that any guests will have been using these insns, > but in any case the fp16 work will be all done before the next > QEMU release and the insns re-enabled... > --- > target/arm/cpu.h | 7 +------ > 1 file changed, 1 insertion(+), 6 deletions(-) Cc qemu-stable, for the bug fix? Reviewed-by: Richard Henderson r~