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[176.171.211.120]) by smtp.gmail.com with ESMTPSA id z18-20020a05600c221200b0040607da271asm3870747wml.31.2023.10.05.07.26.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 05 Oct 2023 07:26:24 -0700 (PDT) Message-ID: <0aaedb1e-2461-6ca5-0f6c-8f50f6eb0686@linaro.org> Date: Thu, 5 Oct 2023 16:26:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v3] hw/isa/vt82c686: Respect SCI interrupt assignment Content-Language: en-US To: BALATON Zoltan , Bernhard Beschow Cc: qemu-devel@nongnu.org, Huacai Chen , Jiaxun Yang References: <20231005115159.81202-1-shentey@gmail.com> <7f0a480e-3b30-36d8-daaf-cb817dcad3ca@eik.bme.hu> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <7f0a480e-3b30-36d8-daaf-cb817dcad3ca@eik.bme.hu> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -62 X-Spam_score: -6.3 X-Spam_bar: ------ X-Spam_report: (-6.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-4.219, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 5/10/23 14:45, BALATON Zoltan wrote: > On Thu, 5 Oct 2023, Bernhard Beschow wrote: >> According to the datasheet, SCI interrupts of the power management >> function >> aren't routed through the PCI pins but rather directly to the >> integrated PIC. >> The routing is configurable through the ACPI interrupt select register >> at offset >> 0x42 in the PCI configuration space of the power management function. >> >> Signed-off-by: Bernhard Beschow >> Reviewed-by: Philippe Mathieu-Daudé >> >> --- >> >> v3: >> * Rename SCI irq attribute to sci_irq (Zoltan) >> * Fix confusion about location of ACPI interrupt select register (Zoltan) >> * Model SCI as named GPIO (Bernhard) >> * Perform upcast via macro rather than sub structure selection (Bernhard) >> >> v2: >> * Introduce named constants for the ACPI interrupt select register at >> offset >>  0x42 (Phil) >> --- >> hw/isa/vt82c686.c | 48 +++++++++++++++++++++++++++++++++++------------ >> 1 file changed, 36 insertions(+), 12 deletions(-) >> >> diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c >> index 57bdfb4e78..aeb9434a46 100644 >> --- a/hw/isa/vt82c686.c >> +++ b/hw/isa/vt82c686.c >> @@ -40,12 +40,17 @@ >> #define TYPE_VIA_PM "via-pm" >> OBJECT_DECLARE_SIMPLE_TYPE(ViaPMState, VIA_PM) >> >> +#define VIA_PM_SCI_SELECT_OFS 0x42 >> +#define VIA_PM_SCI_SELECT_MASK 0xf >> + >> struct ViaPMState { >>     PCIDevice dev; >>     MemoryRegion io; >>     ACPIREGS ar; >>     APMState apm; >>     PMSMBus smb; >> + >> +    qemu_irq sci_irq; >> }; >> >> static void pm_io_space_update(ViaPMState *s) >> @@ -148,18 +153,7 @@ static void pm_update_sci(ViaPMState *s) >>                    ACPI_BITMASK_POWER_BUTTON_ENABLE | >>                    ACPI_BITMASK_GLOBAL_LOCK_ENABLE | >>                    ACPI_BITMASK_TIMER_ENABLE)) != 0); >> -    if (pci_get_byte(s->dev.config + PCI_INTERRUPT_PIN)) { >> -        /* >> -         * FIXME: >> -         * Fix device model that realizes this PM device and remove >> -         * this work around. >> -         * The device model should wire SCI and setup >> -         * PCI_INTERRUPT_PIN properly. >> -         * If PIN# = 0(interrupt pin isn't used), don't raise SCI as >> -         * work around. >> -         */ >> -        pci_set_irq(&s->dev, sci_level); >> -    } >> +    qemu_set_irq(s->sci_irq, sci_level); > > I still think this it more complex that it should be and what's in > via_isa_set_pm_irq() below should be here instead and drop all the named > gpio wizardry that's just unneeded complication here. Zoltan, I'm not sure I get what you mean. Do you mind respining a v4 of Bernhard's patch? Regards, Phil.