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[83.11.13.124]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9a29844425sm310087366b.168.2024.10.17.09.20.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Oct 2024 09:20:06 -0700 (PDT) Message-ID: <0b884126-1fcb-40d2-9fc2-ab0944370fd9@linaro.org> Date: Thu, 17 Oct 2024 18:19:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/7] hw/core: Make CPU topology enumeration arch-agnostic To: Zhao Liu , =?UTF-8?Q?Daniel_P_=2E_Berrang=C3=A9?= , Igor Mammedov , Eduardo Habkost , Marcel Apfelbaum , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , Yanan Wang , "Michael S . Tsirkin" , Paolo Bonzini , Richard Henderson , Eric Blake , Markus Armbruster , Marcelo Tosatti , =?UTF-8?Q?Alex_Benn=C3=A9e?= , Peter Maydell , Jonathan Cameron , Sia Jee Heng , Alireza Sanaee Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Zhenyu Wang , Dapeng Mi , Yongwei Ma References: <20241012104429.1048908-1-zhao1.liu@intel.com> <20241012104429.1048908-2-zhao1.liu@intel.com> From: Marcin Juszkiewicz Content-Language: pl-PL, en-GB Organization: Linaro In-Reply-To: <20241012104429.1048908-2-zhao1.liu@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=marcin.juszkiewicz@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org W dniu 12.10.2024 o 12:44, Zhao Liu pisze: > Cache topology needs to be defined based on CPU topology levels. Thus, > define CPU topology enumeration in qapi/machine.json to make it generic > for all architectures. I have a question: how to create other than default cache topology in C source? If I would like to change default cache structure for sbsa-ref then how would I do it? QEMU has powerful set of command line options. But it is hard to convert set of cli options into C code.