From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: [PATCH v3 3/3] target/arm: Use clear_vec_high more effectively
Date: Tue, 5 May 2020 07:22:00 -0700 [thread overview]
Message-ID: <0b943dee-7275-90ea-2b66-ed5b5246d4be@linaro.org> (raw)
In-Reply-To: <aaa3d497-3c54-9acf-7ef1-fc47bd9d699d@amsat.org>
On 5/4/20 11:09 PM, Philippe Mathieu-Daudé wrote:
>> @@ -7111,7 +7121,7 @@ static void disas_simd_zip_trn
>> }
>> tcg_resl = tcg_const_i64(0);
>> - tcg_resh = tcg_const_i64(0);
>> + tcg_resh = is_q ? tcg_const_i64(0) : NULL;
>> tcg_res = tcg_temp_new_i64();
>> for (i = 0; i < elements; i++) {
>> @@ -7162,9 +7172,12 @@ static void disas_simd_zip_trn(DisasContext *s,
>> uint32_t insn)
>
> More context:
>
> ...
> ofs = i * esize;
> if (ofs < 64) {
> tcg_gen_shli_i64(tcg_res, tcg_res, ofs);
> tcg_gen_or_i64(tcg_resl, tcg_resl, tcg_res);
> } else {
> tcg_gen_shli_i64(tcg_res, tcg_res, ofs - 64);
> tcg_gen_or_i64(tcg_resh, tcg_resh, tcg_res);
>
> here ^^^^^^^^ tcg_resh is NULL too.
>
> }
> }
When is_q is false, the vector length is 64. Thus that line is not reachable.
r~
next prev parent reply other threads:[~2020-05-05 14:25 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-04 19:23 [PATCH v3 0/3] target/arm: misc cleanups Richard Henderson
2020-05-04 19:23 ` [PATCH v3 1/3] target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLA Richard Henderson
2020-05-04 19:23 ` [PATCH v3 2/3] target/arm: Use tcg_gen_gvec_mov for clear_vec_high Richard Henderson
2020-05-04 19:23 ` [PATCH v3 3/3] target/arm: Use clear_vec_high more effectively Richard Henderson
2020-05-05 6:09 ` Philippe Mathieu-Daudé
2020-05-05 14:22 ` Richard Henderson [this message]
2020-05-08 18:45 ` Philippe Mathieu-Daudé
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