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From: weiwei <liweiwei@iscas.ac.cn>
To: Bin Meng <bmeng@tinylab.org>, qemu-devel@nongnu.org
Cc: liweiwei@iscas.ac.cn, Alistair Francis <alistair.francis@wdc.com>,
	Bin Meng <bin.meng@windriver.com>,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	qemu-riscv@nongnu.org
Subject: Re: [PATCH 02/18] target/riscv: Correct the priority policy of riscv_csrrw_check()
Date: Tue, 14 Feb 2023 16:43:26 +0800	[thread overview]
Message-ID: <0bf5f542-474f-ce1e-a661-29be3d9712c8@iscas.ac.cn> (raw)
In-Reply-To: <20230213180215.1524938-3-bmeng@tinylab.org>


On 2023/2/14 02:01, Bin Meng wrote:
> The priority policy of riscv_csrrw_check() was once adjusted in
> commit eacaf4401956 ("target/riscv: Fix priority of csr related check in riscv_csrrw_check")
> whose commit message says the CSR existence check should come
> before the access control check, but the code changes did not
> agree with the commit message, that the predicate() check came
> after the read / write check.
Hi Bin Meng,

Let me explain why I put read-only check before predicate() check in 
commit eacaf4401956:

*  The predicates don't do existence check only. They also do some 
access-control check , and

     will trigger virtual instruction exception in come cases.  I think 
read-only check should be done

     before these access-control check, and trigger illegal instruction 
exception instead of virtual

    instruction exception when writing to read-only CSRs in these cases.

  *  Read-only  check will trigger ILLEGAL_INST exception which is  also 
the exception triggered when

      CSR is not existed, so put this check before existence check will 
not affect the final exception.

Regards,

Weiwei Li

> Fixes: eacaf4401956 ("target/riscv: Fix priority of csr related check in riscv_csrrw_check")
> Signed-off-by: Bin Meng <bmeng@tinylab.org>
> ---
>
>   target/riscv/csr.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 1b0a0c1693..c2dd9d5af0 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -3793,15 +3793,15 @@ static inline RISCVException riscv_csrrw_check(CPURISCVState *env,
>           return RISCV_EXCP_ILLEGAL_INST;
>       }
>   
> -    if (write_mask && read_only) {
> -        return RISCV_EXCP_ILLEGAL_INST;
> -    }
> -
>       RISCVException ret = csr_ops[csrno].predicate(env, csrno);
>       if (ret != RISCV_EXCP_NONE) {
>           return ret;
>       }
>   
> +    if (write_mask && read_only) {
> +        return RISCV_EXCP_ILLEGAL_INST;
> +    }
> +
>   #if !defined(CONFIG_USER_ONLY)
>       int csr_priv, effective_priv = env->priv;
>   



  reply	other threads:[~2023-02-14  8:43 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-13 18:01 [PATCH 00/18] target/riscv: Various fixes to gdbstub and CSR access Bin Meng
2023-02-13 18:01 ` [PATCH 01/18] target/riscv: gdbstub: Check priv spec version before reporting CSR Bin Meng
2023-02-14  8:40   ` weiwei
2023-02-17  2:11   ` LIU Zhiwei
2023-02-13 18:01 ` [PATCH 02/18] target/riscv: Correct the priority policy of riscv_csrrw_check() Bin Meng
2023-02-14  8:43   ` weiwei [this message]
2023-02-17  2:15   ` LIU Zhiwei
2023-02-13 18:01 ` [PATCH 03/18] target/riscv: gdbstub: Minor change for better readability Bin Meng
2023-02-14  8:45   ` weiwei
2023-02-17  2:20   ` LIU Zhiwei
2023-02-13 18:02 ` [PATCH 04/18] target/riscv: gdbstub: Do not generate CSR XML if Zicsr is disabled Bin Meng
2023-02-14  8:46   ` weiwei
2023-02-17  2:23   ` LIU Zhiwei
2023-02-13 18:02 ` [PATCH 05/18] target/riscv: Coding style fixes in csr.c Bin Meng
2023-02-14  8:48   ` weiwei
2023-02-17  2:24   ` LIU Zhiwei
2023-02-13 18:02 ` [PATCH 06/18] target/riscv: Use 'bool' type for read_only Bin Meng
2023-02-14  8:48   ` weiwei
2023-02-17  2:24   ` LIU Zhiwei
2023-02-13 18:02 ` [PATCH 07/18] target/riscv: Simplify {read, write}_pmpcfg() a little bit Bin Meng
2023-02-14  8:50   ` [PATCH 07/18] target/riscv: Simplify {read,write}_pmpcfg() " weiwei
2023-02-17  2:26   ` LIU Zhiwei
2023-02-13 18:02 ` [PATCH 08/18] target/riscv: Simplify getting RISCVCPU pointer from env Bin Meng
2023-02-14  8:51   ` weiwei
2023-02-17  2:30   ` LIU Zhiwei
2023-02-13 18:02 ` [PATCH 09/18] target/riscv: Avoid reporting odd-numbered pmpcfgX in the CSR XML for RV64 Bin Meng
2023-02-14  8:56   ` weiwei
2023-02-17  2:36   ` LIU Zhiwei
2023-02-13 18:02 ` [PATCH 10/18] target/riscv: gdbstub: Turn on debugger mode before calling CSR predicate() Bin Meng
2023-02-14  9:02   ` weiwei
2023-02-17  2:39   ` LIU Zhiwei
2023-02-13 18:02 ` [PATCH 11/18] target/riscv: gdbstub: Drop the vector CSRs in riscv-vector.xml Bin Meng
2023-02-14  9:13   ` weiwei
2023-02-17  2:43   ` LIU Zhiwei
2023-02-13 19:19 ` [PATCH 00/18] target/riscv: Various fixes to gdbstub and CSR access Daniel Henrique Barboza
2023-02-14 14:31   ` Bin Meng
2023-02-14  1:09 ` [PATCH 12/18] target/riscv: Allow debugger to access user timer and counter CSRs Bin Meng
2023-02-14  9:16   ` weiwei
2023-02-17  2:48   ` LIU Zhiwei
2023-02-14  1:09 ` [PATCH 13/18] target/riscv: Allow debugger to access seed CSR Bin Meng
2023-02-14  9:18   ` weiwei
2023-02-17  2:59   ` LIU Zhiwei
2023-02-14  3:06 ` [PATCH 14/18] target/riscv: Allow debugger to access {h, s}stateen CSRs Bin Meng
2023-02-14  9:24   ` weiwei
2023-02-14  4:12 ` [PATCH 15/18] target/riscv: Allow debugger to access sstc CSRs Bin Meng
2023-02-14  9:26   ` weiwei
2023-02-14  4:12 ` [PATCH 16/18] target/riscv: Drop priv level check in mseccfg predicate() Bin Meng
2023-02-14  9:26   ` weiwei
2023-02-14  4:31 ` [PATCH 17/18] target/riscv: Group all predicate() routines together Bin Meng
2023-02-14  9:27   ` weiwei
2023-02-14 14:27 ` [PATCH 18/18] target/riscv: Move configuration check to envcfg CSRs predicate() Bin Meng
2023-02-14 14:59   ` weiwei
2023-02-15  2:22     ` Bin Meng
2023-02-15  2:57       ` weiwei
2023-02-16 16:40       ` Palmer Dabbelt
2023-02-17  1:59         ` Bin Meng
2023-02-17 17:28           ` Palmer Dabbelt

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