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Wed, 09 Jul 2025 18:22:25 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE52OehjlSnKIzZfT9PjfxxvMWt/i7rkJ06XGKH4rPkGll4hRYBcBReWJZeT/chRAV/wwmNKQ== X-Received: by 2002:a17:90b:1c0f:b0:311:d05c:936 with SMTP id 98e67ed59e1d1-31c3c2d493fmr3895089a91.17.1752110544614; Wed, 09 Jul 2025 18:22:24 -0700 (PDT) Received: from [192.168.40.164] ([70.105.235.240]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23de4323daesm4441965ad.139.2025.07.09.18.22.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 09 Jul 2025 18:22:24 -0700 (PDT) Message-ID: <0c99b6aa-440a-44df-b875-a34e64465a04@redhat.com> Date: Wed, 9 Jul 2025 21:22:18 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 02/20] hw/pci: Introduce pci_device_get_viommu_cap() Content-Language: en-US To: Nicolin Chen Cc: Zhenzhong Duan , qemu-devel@nongnu.org, alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, jgg@nvidia.com, shameerali.kolothum.thodi@huawei.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com References: <20250708110601.633308-1-zhenzhong.duan@intel.com> <20250708110601.633308-3-zhenzhong.duan@intel.com> <01584206-e2c0-4881-aaf5-d6c552a30873@redhat.com> From: Donald Dutile In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=ddutile@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 7/9/25 3:20 PM, Nicolin Chen wrote: > On Wed, Jul 09, 2025 at 01:55:46PM -0400, Donald Dutile wrote: >>>> +enum { >>>> + VIOMMU_CAP_STAGE1 = BIT_ULL(0), /* stage1 page table supported */ >>>> +}; >>> >>> Thanks for this work. I am happy to see that we can share the >>> common code that allocates a NESTING_PARENT in the core using >>> this flag. >>> >>> Yet on ARM, a STAGE1 page table isn't always a nested S1, the >>> hardware accelerated one. More often, it can be just a regular >>> 1-stage translation table via emulated translation code and an >>> emulated iotlb. >>> >> Because the user-created smmuv3 started as 'accelerated smmuv3', >> and had been 'de-accelerated' to simply 'user created smmuv3', >> I'm looking for some clarification in the above statement/request. >> >> Is the above suppose to reflect that a nested IOMMU has some hw-acceleration >> in its Stage1 implementation? >> If so, then call it that: STAGE1_ACCEL. >> If it's suppose to represent that an IOMMU has nested/2-stage support, >> then the above is a valid cap; -but-, having a nested/2-stage support IOMMU >> doesn't necessarily mean its accelerated. > > Well, there are an emulated "nested" mode and an hw-accelerated > "nested" mode in the smmuv3 code, so we had to choose something > like "accel" over "nested". > > Here, on the other hand, I think the core using this CAP would > unlikely care about an emulated "nested" mode in the individual > vIOMMU.. > > So I suggested: > /* hardware-accelerated nested stage-1 page table support */ > VIOMMU_CAP_NESTED_S1 = BIT_ULL(0), > > which it should be clear IMHO. > > If not, maybe go a bit further like "VIOMMU_CAP_HW_NESTED_S1"? > > Thanks > Nicolin > If the distinction is hw-based s1 vs emulated-based s1, than I'd prefer the use of VIOMMU_CAP_HW_NESTED_S1, and avoid the use of 'accel'/'ACCEL' unless it is an explicitly stated 'acceleration' feature/option in the SMMU spec. Thanks, - Don