From: Eric Auger <eric.auger@redhat.com>
To: "Duan, Zhenzhong" <zhenzhong.duan@intel.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "alex.williamson@redhat.com" <alex.williamson@redhat.com>,
"clg@redhat.com" <clg@redhat.com>,
"mst@redhat.com" <mst@redhat.com>,
"jasowang@redhat.com" <jasowang@redhat.com>,
"peterx@redhat.com" <peterx@redhat.com>,
"jgg@nvidia.com" <jgg@nvidia.com>,
"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
"shameerali.kolothum.thodi@huawei.com"
<shameerali.kolothum.thodi@huawei.com>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"clement.mathieu--drif@eviden.com"
<clement.mathieu--drif@eviden.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
"Liu, Yi L" <yi.l.liu@intel.com>,
"Peng, Chao P" <chao.p.peng@intel.com>
Subject: Re: [PATCH rfcv2 06/20] host_iommu_device: Define two new capabilities HOST_IOMMU_DEVICE_CAP_[NESTING|FS1GP]
Date: Thu, 6 Mar 2025 16:59:39 +0100 [thread overview]
Message-ID: <0ccbf699-e6be-4936-89f7-b4f69672516f@redhat.com> (raw)
In-Reply-To: <SJ0PR11MB6744FAC917F2DF9A7BF9FF9992CC2@SJ0PR11MB6744.namprd11.prod.outlook.com>
On 2/28/25 9:29 AM, Duan, Zhenzhong wrote:
> Hi Eric,
>
>> -----Original Message-----
>> From: Eric Auger <eric.auger@redhat.com>
>> Subject: Re: [PATCH rfcv2 06/20] host_iommu_device: Define two new
>> capabilities HOST_IOMMU_DEVICE_CAP_[NESTING|FS1GP]
>>
>> Hi Zhenzhong,
>>
>>
>> On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>>> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
>>> ---
>>> include/system/host_iommu_device.h | 8 ++++++++
>>> 1 file changed, 8 insertions(+)
>>>
>>> diff --git a/include/system/host_iommu_device.h
>> b/include/system/host_iommu_device.h
>>> index df782598f2..18f8b5e5cf 100644
>>> --- a/include/system/host_iommu_device.h
>>> +++ b/include/system/host_iommu_device.h
>>> @@ -22,10 +22,16 @@
>>> *
>>> * @hw_caps: host platform IOMMU capabilities (e.g. on IOMMUFD this
>> represents
>>> * the @out_capabilities value returned from IOMMU_GET_HW_INFO
>> ioctl)
>>> + *
>>> + * @nesting: nesting page table support.
>>> + *
>>> + * @fs1gp: first stage(a.k.a, Stage-1) 1GB huge page support.
>>> */
>>> typedef struct HostIOMMUDeviceCaps {
>>> uint32_t type;
>>> uint64_t hw_caps;
>>> + bool nesting;
>>> + bool fs1gp;
>> this looks quite vtd specific, isn't it? Shouldn't we hide this is a
>> vendor specific cap struct?
> Yes? I guess ARM hw could also provide nesting support at least
> There are some reasons I perfer a flatten struct even if some
> Elements may be vendor specific.
> 1. If a vendor doesn't support an capability for other vendor,
> corresponding element should be zero by default.
> 2. An element vendor specific may become generic in future
> and we don't need to update the structure when that happens.
> 3. vIOMMU calls get_cap() to query if a capability is supported,
> so a vIOMMU never query a vendor specific capability it doesn't
> recognize. Even if that happens, zero is returned hinting no support.
I will let others comment but in general this is frown upon and unions
are prefered at least.
Eric
>
> Thanks
> Zhenzhong
>
next prev parent reply other threads:[~2025-03-06 16:00 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-19 8:22 [PATCH rfcv2 00/20] intel_iommu: Enable stage-1 translation for passthrough device Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 01/20] backends/iommufd: Add helpers for invalidating user-managed HWPT Zhenzhong Duan
2025-02-20 16:47 ` Eric Auger
2025-02-28 2:26 ` Duan, Zhenzhong
2025-02-24 10:03 ` Shameerali Kolothum Thodi via
2025-02-28 9:36 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 02/20] vfio/iommufd: Add properties and handlers to TYPE_HOST_IOMMU_DEVICE_IOMMUFD Zhenzhong Duan
2025-02-20 17:42 ` Eric Auger
2025-02-28 5:39 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 03/20] HostIOMMUDevice: Introduce realize_late callback Zhenzhong Duan
2025-02-20 17:48 ` Eric Auger
2025-02-28 8:16 ` Duan, Zhenzhong
2025-03-06 15:53 ` Eric Auger
2025-04-07 11:19 ` Cédric Le Goater
2025-04-08 8:00 ` Cédric Le Goater
2025-04-09 8:27 ` Duan, Zhenzhong
2025-04-09 9:58 ` Cédric Le Goater
2025-02-19 8:22 ` [PATCH rfcv2 04/20] vfio/iommufd: Implement HostIOMMUDeviceClass::realize_late() handler Zhenzhong Duan
2025-02-20 18:07 ` Eric Auger
2025-02-28 8:23 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 05/20] vfio/iommufd: Implement [at|de]tach_hwpt handlers Zhenzhong Duan
2025-02-20 18:13 ` Eric Auger
2025-02-28 8:24 ` Duan, Zhenzhong
2025-03-06 15:56 ` Eric Auger
2025-02-19 8:22 ` [PATCH rfcv2 06/20] host_iommu_device: Define two new capabilities HOST_IOMMU_DEVICE_CAP_[NESTING|FS1GP] Zhenzhong Duan
2025-02-20 18:41 ` Eric Auger
2025-02-20 18:44 ` Eric Auger
2025-02-28 8:29 ` Duan, Zhenzhong
2025-03-06 15:59 ` Eric Auger [this message]
2025-03-06 19:45 ` Nicolin Chen
2025-03-10 3:48 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 07/20] iommufd: Implement query of HOST_IOMMU_DEVICE_CAP_[NESTING|FS1GP] Zhenzhong Duan
2025-02-20 19:00 ` Eric Auger
2025-02-28 8:32 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 08/20] iommufd: Implement query of HOST_IOMMU_DEVICE_CAP_ERRATA Zhenzhong Duan
2025-02-20 18:55 ` Eric Auger
2025-02-28 8:31 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 09/20] intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry Zhenzhong Duan
2025-02-21 6:39 ` CLEMENT MATHIEU--DRIF
2025-02-21 10:11 ` Eric Auger
2025-02-28 8:47 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 10/20] intel_iommu: Optimize context entry cache utilization Zhenzhong Duan
2025-02-21 10:00 ` Eric Auger
2025-02-28 8:34 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 11/20] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on Zhenzhong Duan
2025-02-21 12:49 ` Eric Auger
2025-02-21 14:18 ` Eric Auger
2025-02-28 8:57 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 12/20] intel_iommu: Introduce a new structure VTDHostIOMMUDevice Zhenzhong Duan
2025-02-21 13:03 ` Eric Auger
2025-02-28 8:58 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 13/20] intel_iommu: Add PASID cache management infrastructure Zhenzhong Duan
2025-02-21 17:02 ` Eric Auger
2025-02-28 9:35 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 14/20] intel_iommu: Bind/unbind guest page table to host Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 15/20] intel_iommu: ERRATA_772415 workaround Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 16/20] intel_iommu: Replay pasid binds after context cache invalidation Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 17/20] intel_iommu: Propagate PASID-based iotlb invalidation to host Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 18/20] intel_iommu: Refresh pasid bind when either SRTP or TE bit is changed Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 19/20] intel_iommu: Bypass replay in stage-1 page table mode Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 20/20] intel_iommu: Enable host device when x-flts=on in scalable mode Zhenzhong Duan
2025-02-20 19:03 ` [PATCH rfcv2 00/20] intel_iommu: Enable stage-1 translation for passthrough device Eric Auger
2025-02-21 6:08 ` Duan, Zhenzhong
2025-04-05 3:01 ` Donald Dutile
2025-05-19 8:37 ` Duan, Zhenzhong
2025-05-19 15:39 ` Donald Dutile
2025-05-20 9:13 ` Duan, Zhenzhong
2025-05-20 10:47 ` Donald Dutile
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0ccbf699-e6be-4936-89f7-b4f69672516f@redhat.com \
--to=eric.auger@redhat.com \
--cc=alex.williamson@redhat.com \
--cc=chao.p.peng@intel.com \
--cc=clement.mathieu--drif@eviden.com \
--cc=clg@redhat.com \
--cc=jasowang@redhat.com \
--cc=jgg@nvidia.com \
--cc=joao.m.martins@oracle.com \
--cc=kevin.tian@intel.com \
--cc=mst@redhat.com \
--cc=nicolinc@nvidia.com \
--cc=peterx@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=shameerali.kolothum.thodi@huawei.com \
--cc=yi.l.liu@intel.com \
--cc=zhenzhong.duan@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).