From: Akihiko Odaki <akihiko.odaki@daynix.com>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Bin Meng" <bin.meng@windriver.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Mikhail Tyutin" <m.tyutin@yadro.com>,
"Aleksandr Anenkov" <a.anenkov@yadro.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Fabiano Rosas" <farosas@suse.de>,
"Andrew Jones" <ajones@ventanamicro.com>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
"Pierrick Bouvier" <pierrick.bouvier@linaro.org>
Subject: Re: [PATCH v11 0/3] gdbstub and TCG plugin improvements
Date: Tue, 6 Feb 2024 17:36:20 +0900 [thread overview]
Message-ID: <0ce6ef8c-1ea3-4f24-9998-c76ed6016cb4@daynix.com> (raw)
In-Reply-To: <8734u7gsv0.fsf@draig.linaro.org>
On 2024/02/05 18:31, Alex Bennée wrote:
> Akihiko Odaki <akihiko.odaki@daynix.com> writes:
>
>> On 2024/02/03 22:58, Alex Bennée wrote:
>>> Akihiko Odaki <akihiko.odaki@daynix.com> writes:
>>>
>>>> On 2024/02/03 20:08, Alex Bennée wrote:
>>>>> Akihiko Odaki <akihiko.odaki@daynix.com> writes:
>>>>>
>>>>>> This series extracts fixes and refactorings that can be applied
>>>>>> independently from "[PATCH v9 00/23] plugins: Allow to read registers".
>>>>>>
>>>>>> The patch "target/riscv: Move MISA limits to class" was replaced with
>>>>>> patch "target/riscv: Move misa_mxl_max to class" since I found instances
>>>>>> may have different misa_ext_mask.
>>>>> As this is re-based on Alistair's riscv-to-apply.next tree I'll wait
>>>>> for
>>>>> this to go through the RiscV trees and then re-base the plugin patches
>>>>> and dropping the merged riscv patches from my tree.
>>>>> In the meantime feel free to review:
>>>>> Message-Id: <20240122145610.413836-1-alex.bennee@linaro.org>
>>>>> Date: Mon, 22 Jan 2024 14:55:49 +0000
>>>>> Subject: [PATCH v3 00/21] plugin updates (register access) for 9.0 (pre-PR?)
>>>>> From: =?UTF-8?q?Alex=20Benn=C3=A9e?= <alex.bennee@linaro.org>
>>>>> For:
>>>>> contrib/plugins: extend execlog to track register changes
>>>>> gdbstub: expose api to find registers
>>>>> So I can add this to my maintainer omnibus series for the next PR I
>>>>> send.
>>>>
>>>> I added one trivial comment to: "gdbstub: expose api to find registers"
>>>>
>>>> "contrib/plugins: extend execlog to track register changes" depends on
>>>> "plugins: add an API to read registers". The comments for the patch in
>>>> the following email are not addressed yet:
>>>> https://lore.kernel.org/all/4b2156ed-688d-4617-b52d-200413f01156@daynix.com/
>>> I don't think we need to serialise with the BQL as the structures
>>> are
>>> per-CPU (and created on vCPU creation).
>>
>> qemu_plugin_get_registers() has vcpu parameter, which can refer to a
>> different vcpu the caller is on (or the caller may not be in a vcpu
>> context at all).
>
> It should only be called from the current cpu context. We can either
> assert that or make it implicit like qemu_plugin_insn_disas does.
> However we will need to ensure current_cpu is set before the vcpu_init
> callback.
Then that should be documented and the vcpu_index parameter should be
deleted.
next prev parent reply other threads:[~2024-02-06 8:37 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-03 10:11 [PATCH v11 0/3] gdbstub and TCG plugin improvements Akihiko Odaki
2024-02-03 10:11 ` [PATCH v11 1/3] target/riscv: Remove misa_mxl validation Akihiko Odaki
2024-02-03 10:11 ` [PATCH v11 2/3] target/riscv: Move misa_mxl_max to class Akihiko Odaki
2024-02-03 10:11 ` [PATCH v11 3/3] target/riscv: Validate misa_mxl_max only once Akihiko Odaki
2024-02-03 11:08 ` [PATCH v11 0/3] gdbstub and TCG plugin improvements Alex Bennée
2024-02-03 11:26 ` Akihiko Odaki
2024-02-03 13:58 ` Alex Bennée
2024-02-04 6:54 ` Akihiko Odaki
2024-02-05 9:31 ` Alex Bennée
2024-02-05 10:03 ` Pierrick Bouvier
2024-02-05 11:20 ` Alex Bennée
2024-02-06 8:36 ` Akihiko Odaki [this message]
2024-02-04 23:42 ` Alistair Francis
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