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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e5b69bc0bsm15747785e9.3.2025.09.30.08.04.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 Sep 2025 08:04:52 -0700 (PDT) Message-ID: <0cfac891-cc6c-478a-9e6d-fc5dc44f0239@redhat.com> Date: Tue, 30 Sep 2025 17:04:50 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 09/22] intel_iommu: Stick to system MR for IOMMUFD backed host device when x-fls=on Content-Language: en-US To: Zhenzhong Duan , qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, ddutile@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, skolothumtho@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com References: <20250918085803.796942-1-zhenzhong.duan@intel.com> <20250918085803.796942-10-zhenzhong.duan@intel.com> From: Eric Auger In-Reply-To: <20250918085803.796942-10-zhenzhong.duan@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Zhenzhong, On 9/18/25 10:57 AM, Zhenzhong Duan wrote: > When guest enables scalable mode and setup first stage page table, we don't > want to use IOMMU MR but rather continue using the system MR for IOMMUFD > backed host device. > > Then default HWPT in VFIO contains GPA->HPA mappings which could be reused > as nesting parent HWPT to construct nested HWPT in vIOMMU. > > Suggested-by: Yi Liu > Signed-off-by: Zhenzhong Duan > --- > hw/i386/intel_iommu.c | 37 +++++++++++++++++++++++++++++++++++-- > 1 file changed, 35 insertions(+), 2 deletions(-) > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index ba40649c85..bd80de1670 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -40,6 +40,7 @@ > #include "kvm/kvm_i386.h" > #include "migration/vmstate.h" > #include "trace.h" > +#include "system/iommufd.h" > > /* context entry operations */ > #define RID_PASID 0 > @@ -1702,6 +1703,24 @@ static bool vtd_dev_pt_enabled(IntelIOMMUState *s, VTDContextEntry *ce, > > } > > +static VTDHostIOMMUDevice *vtd_find_hiod_iommufd(VTDAddressSpace *as) > +{ > + IntelIOMMUState *s = as->iommu_state; > + struct vtd_as_key key = { > + .bus = as->bus, > + .devfn = as->devfn, > + }; > + VTDHostIOMMUDevice *vtd_hiod = g_hash_table_lookup(s->vtd_host_iommu_dev, > + &key); > + > + if (vtd_hiod && vtd_hiod->hiod && > + object_dynamic_cast(OBJECT(vtd_hiod->hiod), > + TYPE_HOST_IOMMU_DEVICE_IOMMUFD)) { > + return vtd_hiod; > + } > + return NULL; > +} > + > static bool vtd_as_pt_enabled(VTDAddressSpace *as) > { > IntelIOMMUState *s; > @@ -1710,6 +1729,7 @@ static bool vtd_as_pt_enabled(VTDAddressSpace *as) > assert(as); > > s = as->iommu_state; > + not needed > if (vtd_dev_to_context_entry(s, pci_bus_num(as->bus), as->devfn, > &ce)) { > /* > @@ -1727,12 +1747,25 @@ static bool vtd_as_pt_enabled(VTDAddressSpace *as) > /* Return whether the device is using IOMMU translation. */ > static bool vtd_switch_address_space(VTDAddressSpace *as) > { > + IntelIOMMUState *s; > bool use_iommu, pt; > > assert(as); > > - use_iommu = as->iommu_state->dmar_enabled && !vtd_as_pt_enabled(as); > - pt = as->iommu_state->dmar_enabled && vtd_as_pt_enabled(as); > + s = as->iommu_state; nit: init could be done at declaration > + use_iommu = s->dmar_enabled && !vtd_as_pt_enabled(as); > + pt = s->dmar_enabled && vtd_as_pt_enabled(as); > + > + /* > + * When guest enables scalable mode and setup first stage page table, sets up? > + * we stick to system MR for IOMMUFD backed host device. Then its > + * default hwpt contains GPA->HPA mappings which is used directly > + * if PGTT=PT and used as nesting parent if PGTT=FST. Otherwise > + * fallback to original processing. fall back? > + */ > + if (s->root_scalable && s->fsts && vtd_find_hiod_iommufd(as)) { > + use_iommu = false; > + } > > trace_vtd_switch_address_space(pci_bus_num(as->bus), > VTD_PCI_SLOT(as->devfn), Besides Reviewed-by: Eric Auger Eric