From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=40847 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1ORKFT-0003zL-DN for qemu-devel@nongnu.org; Wed, 23 Jun 2010 03:19:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1ORKFS-0004EC-2u for qemu-devel@nongnu.org; Wed, 23 Jun 2010 03:19:51 -0400 Received: from smtp12.dti.ne.jp ([202.216.231.187]:53544) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1ORKFR-00049c-IU for qemu-devel@nongnu.org; Wed, 23 Jun 2010 03:19:50 -0400 Received: from udon2 ([221.114.248.147]) by smtp12.dti.ne.jp (3.11s) with ESMTP AUTH id o5N7JKbO001559 for ; Wed, 23 Jun 2010 16:19:20 +0900 (JST) From: "KAWAKATSU, Noritaka" References: <4C1FF537.5020904@interdesigntech.co.jp> <87eifzsaar.fsf@lechat.rtp-net.org> <4C2086F2.8070606@interdesigntech.co.jp> In-Reply-To: <4C2086F2.8070606@interdesigntech.co.jp> Subject: RE: [Qemu-devel] u-boot on 'qemu-system-mips64 -M mips' Date: Wed, 23 Jun 2010 16:19:20 +0900 Message-ID: <0d1b01cb12a4$663f6bc0$32be4340$@interdesigntech.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Content-Language: ja List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org I report the workaround for u-boot execution on qemu-system-mips64. > movn s1,v1,v0 >> From what I understand when reading the mips IV manual, the movn ins >> is > only for mips IV / 32bit and not 64bit. Looks like the qemu code has > been written following this. (This also explains why qemu-system-mips > is fine and not qemu-system-mips64). I have rebuilt u-boot by the configuration customed for R4400 architecture: >>From original gcc option script '-march=4kc ..' to '-march=r4400 ..'. R4400 has inst set without 'movn'. The binary built by this process runs on both 'qemu-system-mips' and 'qemu-system-mips64'. Thank you. --- Noritaka KAWAKATSU -----Original Message----- From: qemu-devel-bounces+kawakatsu.noritaka=interdesigntech.co.jp@nongnu.org [mailto:qemu-devel-bounces+kawakatsu.noritaka=interdesigntech.co.jp@nongnu.org] On Behalf Of KAWAKATSU Noritaka Sent: Tuesday, June 22, 2010 6:49 PM To: qemu-devel@nongnu.org Subject: Re: [Qemu-devel] u-boot on 'qemu-system-mips64 -M mips' Thank you for your reply. > so EPC is set to ffffffffbfc0ee94 which is : > movn s1,v1,v0 > >> From what I understand when reading the mips IV manual, the movn ins is > only for mips IV / 32bit and not 64bit. Looks like the qemu code has > been written following this. (This also explains why qemu-system-mips is > fine and not qemu-system-mips64). > > Arnaud I understand that the relaation between MIPS32/MIPS64 arch is upper compatible (from MIPS32 to MIPS64). I wonder if this fact (the movn ins is only for mips IV / 32bit and not 64bit) be true, umm. Please let me know the list of instructions like this (32/64 not compatible) if you know, or give me a hint to investigate? Noritata KAWAKATSU. (2010/06/22 18:09), Arnaud Patard (Rtp) wrote: > KAWAKATSU Noritaka writes: > >> Hi, > > > Hi, >> >> I have built u-boot binary for 'qemu-system-mips -M mips'. >> It is fine to run ths u-boot binary. >> But the same u-boot binary does not run on 'qemu-system-mips64 -M mips'. >> >> I do not understand what happends on the qemu-mips64 execution. >> Is this a bug for qemu-system-mips64 ? >> Or should I build u-boot binary by another configuration? >> >> ------ >> * u-boot building steps >> (1) build the gcc 4.5 cross-compiler for mips from the source. >> (2) build u-boot(2010.03) by the (1)compiler. >> (3) copy the u-boot.bin to /usr/share/qemu/mips_bios.bin >> * qemu(mips) execution command >> $ qemu-system-mips -L /usr/share/qemu -d in_asm -nographic >> * get /tmp/qemu.log >> the execution seems fine. >> >> * qemu(mips64) execution command >> $ qemu-system-mips64 -L /usr/share/qemu -d in_asm -nographic >> * get /tmp/qemu.log >> the execution seems not fine. Something is wrong? >> >> >> >> ----- /tmp/qemu.log (last 10-20 lines) [qemu-system-mips64] >> IN: >> 0xffffffffbfc0ee8c: xori v0,v0,0x3d >> 0xffffffffbfc0ee90: li v1,-1 >> 0xffffffffbfc0ee94: movn s1,v1,v0 >> 0xffffffffbfc0ee98: lw ra,52(sp) >> 0xffffffffbfc0ee9c: move v0,s1 >> 0xffffffffbfc0eea0: lw s3,48(sp) >> 0xffffffffbfc0eea4: lw s2,44(sp) >> 0xffffffffbfc0eea8: lw s1,40(sp) >> 0xffffffffbfc0eeac: lw s0,36(sp) >> 0xffffffffbfc0eeb0: jr ra >> 0xffffffffbfc0eeb4: addiu sp,sp,56 >> >> helper_raise_exception_err: 20 0 >> do_interrupt enter: PC ffffffffbfc0ee94 EPC 0000000000000000 reserved >> instruction exception >> do_interrupt: PC ffffffffbfc00380 EPC ffffffffbfc0ee94 cause 10 >> S 00400002 C 00808428 A 0000000000000000 D 0000000000000000 > > so EPC is set to ffffffffbfc0ee94 which is : > movn s1,v1,v0 > >> From what I understand when reading the mips IV manual, the movn ins >> is > only for mips IV / 32bit and not 64bit. Looks like the qemu code has > been written following this. (This also explains why qemu-system-mips > is fine and not qemu-system-mips64). > > > Arnaud > > >