From: Richard Henderson <richard.henderson@linaro.org>
To: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Cc: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>,
"aurelien@aurel32.net" <aurelien@aurel32.net>,
"aleksandar.rikalo@rt-rk.com" <aleksandar.rikalo@rt-rk.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"amarkovic@wavecomp.com" <amarkovic@wavecomp.com>
Subject: Re: [PATCH v4 6/7] disas: mips: Add micromips R6 disassembler - infrastructure and 16-bit instructions
Date: Fri, 24 Jan 2020 21:51:02 -1000 [thread overview]
Message-ID: <0d2d0fff-302b-b8e6-cbc6-5c2bb66f1f8e@linaro.org> (raw)
In-Reply-To: <CAL1e-=g89vC8gw6xNiGcNAhDixX2xZgnDjKgvDsChkvHHpduQA@mail.gmail.com>
On 1/24/20 1:38 PM, Aleksandar Markovic wrote:
> On Friday, January 24, 2020, Richard Henderson <richard.henderson@linaro.org
> <mailto:richard.henderson@linaro.org>> wrote:
> The thing I'm concerned about here is any future maintenance of this file. One
> would surely prefer to edit the original decodetree input than this output.
>
>
> Here is the deal: This dissasembler is meant to reflect the documentation of a
> particular ISA, and as the documentation largely stays constant (except adding
> some insignificant errata), the disassembler will stay virtually constant, we
> wouldn't like even to touch it, and we like it this way.
No, this is neither right nor proper.
To review the code in this form is significantly harder than in its decodetree
form. That is in fact the whole point of the decodetree form: otherwise we'd
still be writing these sorts of parsers by hand.
While there's no license on this new file (another problem), if as assumed this
is GPL 2+, then you are in violation of the GPL. From section 3:
# The source code for a work means the preferred form of
# the work for making modifications to it.
You cannot with a straight face claim that the generated c is the preferred
form for making modifications.
Finally, suppose we improve decodetree.py, so that it produces code with which
the compiler produces better code, for some metric of better. We would want
this disassembler to benefit as well.
r~
next prev parent reply other threads:[~2020-01-25 7:51 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-24 16:38 [PATCH v4 0/7] target/mips: Misc MIPS fixes and improvements for 5.0 Aleksandar Markovic
2020-01-24 16:38 ` [PATCH v4 1/7] target/mips: Rectify documentation on deprecating r4k machine Aleksandar Markovic
2020-01-24 16:38 ` [PATCH v4 2/7] target/mips: Add support for MIPS<32|64>R6 CRC32 ISA Aleksandar Markovic
2020-01-24 16:38 ` [PATCH v4 3/7] target/mips: Amend CP0 WatchHi register implementation Aleksandar Markovic
2020-01-24 17:22 ` Aleksandar Rikalo
2020-01-24 16:38 ` [PATCH v4 4/7] target/mips: Add implementation of GINVT instruction Aleksandar Markovic
2020-01-24 17:23 ` Aleksandar Rikalo
2020-01-24 16:38 ` [PATCH v4 5/7] disas: Add a field for target-dependant data Aleksandar Markovic
2020-01-24 17:25 ` Aleksandar Rikalo
2020-01-24 16:38 ` [PATCH v4 6/7] disas: mips: Add micromips R6 disassembler - infrastructure and 16-bit instructions Aleksandar Markovic
2020-01-24 19:44 ` Richard Henderson
2020-01-24 20:56 ` Aleksandar Markovic
2020-01-24 21:03 ` Richard Henderson
2020-01-24 23:38 ` Aleksandar Markovic
2020-01-25 7:51 ` Richard Henderson [this message]
2020-01-25 10:22 ` Aleksandar Markovic
2020-01-25 18:06 ` Richard Henderson
2020-01-24 16:38 ` [PATCH v4 7/7] disas: mips: Add micromips R6 disassembler - 32-bit instructions Aleksandar Markovic
2020-01-24 17:04 ` [PATCH v4 0/7] target/mips: Misc MIPS fixes and improvements for 5.0 no-reply
2020-01-24 18:09 ` no-reply
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