From: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
To: Greg Kurz <groug@kaod.org>
Cc: aik@au1.ibm.com, qemu-devel@nongnu.org, paulus@ozlabs.org,
qemu-ppc@nongnu.org, david@gibson.dropbear.id.au
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH v8 1/6] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
Date: Mon, 13 May 2019 10:27:09 +0530 [thread overview]
Message-ID: <0da3ea09-52a0-9b5e-5ee9-5da2f8f72878@linux.vnet.ibm.com> (raw)
In-Reply-To: <20190510163350.58cc85b9@bahia.lab.toulouse-stg.fr.ibm.com>
On Friday 10 May 2019 08:03 PM, Greg Kurz wrote:
> On Fri, 10 May 2019 11:06:04 +0200
> Greg Kurz <groug@kaod.org> wrote:
>
>> On Mon, 22 Apr 2019 12:32:58 +0530
>> Aravinda Prasad <aravinda@linux.vnet.ibm.com> wrote:
>>
>>> This patch adds support in QEMU to handle "ibm,nmi-register"
>>> and "ibm,nmi-interlock" RTAS calls.
>>>
>>> The machine check notification address is saved when the
>>> OS issues "ibm,nmi-register" RTAS call.
>>>
>>> This patch also handles the case when multiple processors
>>> experience machine check at or about the same time by
>>> handling "ibm,nmi-interlock" call. In such cases, as per
>>> PAPR, subsequent processors serialize waiting for the first
>>> processor to issue the "ibm,nmi-interlock" call. The second
>>> processor that also received a machine check error waits
>>> till the first processor is done reading the error log.
>>> The first processor issues "ibm,nmi-interlock" call
>>> when the error log is consumed. This patch implements the
>>> releasing part of the error-log while subsequent patch
>>> (which builds error log) handles the locking part.
>>>
>>> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
>>> ---
>>> hw/ppc/spapr.c | 18 ++++++++++++++
>>> hw/ppc/spapr_rtas.c | 61 ++++++++++++++++++++++++++++++++++++++++++++++++
>>> include/hw/ppc/spapr.h | 9 ++++++-
>>> 3 files changed, 87 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
>>> index c56939a..6642cb5 100644
>>> --- a/hw/ppc/spapr.c
>>> +++ b/hw/ppc/spapr.c
>>> @@ -1805,6 +1805,11 @@ static void spapr_machine_reset(void)
>>> first_ppc_cpu->env.gpr[5] = 0;
>>>
>>> spapr->cas_reboot = false;
>>> +
>>> + spapr->guest_machine_check_addr = -1;
>>> +
>>> + /* Signal all vCPUs waiting on this condition */
>>> + qemu_cond_broadcast(&spapr->mc_delivery_cond);
>>> }
>>>
>>> static void spapr_create_nvram(SpaprMachineState *spapr)
>>> @@ -2095,6 +2100,16 @@ static const VMStateDescription vmstate_spapr_dtb = {
>>> },
>>> };
>>>
>>> +static const VMStateDescription vmstate_spapr_machine_check = {
>>> + .name = "spapr_machine_check",
>>> + .version_id = 1,
>>> + .minimum_version_id = 1,
>>> + .fields = (VMStateField[]) {
>>> + VMSTATE_UINT64(guest_machine_check_addr, SpaprMachineState),
>
> Also this should use VMSTATE_UINTTL()
sure..
Regards,
Aravinda
>
>>> + VMSTATE_END_OF_LIST()
>>> + },
>>
>> This VMState descriptor is missing a .needed field because we only want
>> to migrate the subsection if the guest has called NMI register, ie.
>> spapr->guest_machine_check_addr != (target_ulong) -1.
>>
>>> +};
>>> +
>>> static const VMStateDescription vmstate_spapr = {765cf442a8afe8e5c8c6896b5072066df5129077
>>> .name = "spapr",
>>> .version_id = 3,
>>> @@ -2127,6 +2142,7 @@ static const VMStateDescription vmstate_spapr = {
>>> &vmstate_spapr_dtb,
>>> &vmstate_spapr_cap_large_decr,
>>> &vmstate_spapr_cap_ccf_assist,
>>> + &vmstate_spapr_machine_check,
>>> NULL
>>> }
>>> };
>>> @@ -3068,6 +3084,8 @@ static void spapr_machine_init(MachineState *machine)
>>>
>>> kvmppc_spapr_enable_inkernel_multitce();
>>> }
>>> +
>>> + qemu_cond_init(&spapr->mc_delivery_cond);
>>> }
>>>
>>> static int spapr_kvm_type(MachineState *machine, const char *vm_type)
>>> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
>>> index ee24212..c2f3991 100644
>>> --- a/hw/ppc/spapr_rtas.c
>>> +++ b/hw/ppc/spapr_rtas.c
>>> @@ -348,6 +348,39 @@ static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
>>> rtas_st(rets, 1, 100);
>>> }
>>>
>>> +static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
>>> + SpaprMachineState *spapr,
>>> + uint32_t token, uint32_t nargs,
>>> + target_ulong args,
>>> + uint32_t nret, target_ulong rets)
>>> +{
>>> + uint64_t rtas_addr = spapr_get_rtas_addr();
>>> +
>>> + if (!rtas_addr) {
>>> + rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
>>> + return;
>>> + }
>>> +
>>> + spapr->guest_machine_check_addr = rtas_ld(args, 1);
>>> + rtas_st(rets, 0, RTAS_OUT_SUCCESS);
>>> +}
>>> +
>>> +static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
>>> + SpaprMachineState *spapr,
>>> + uint32_t token, uint32_t nargs,
>>> + target_ulong args,
>>> + uint32_t nret, target_ulong rets)
>>> +{
>>> + if (!spapr->guest_machine_check_addr) {
>>
>> Hmm... the default value is -1. It looks like the check should rather be:
>>
>> if (spapr->guest_machine_check_addr == (target_ulong) -1) {
>>
>>
>>> + /* NMI register not called */
>>> + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
>>> + } else {
>>> + qemu_cond_signal(&spapr->mc_delivery_cond);
>>> + rtas_st(rets, 0, RTAS_OUT_SUCCESS);
>>> + }
>>> +}
>>> +
>>> +
>>> static struct rtas_call {
>>> const char *name;
>>> spapr_rtas_fn fn;
>>> @@ -466,6 +499,30 @@ void spapr_load_rtas(SpaprMachineState *spapr, void *fdt, hwaddr addr)
>>> }
>>> }
>>>
>>> +uint64_t spapr_get_rtas_addr(void)
>>
>> Shouldn't this be hwaddr instead of uint64_t ?
>>
>>> +{
>>> + SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
>>> + int rtas_node;
>>> + const struct fdt_property *rtas_addr_prop;
>>> + void *fdt = spapr->fdt_blob;
>>> + uint32_t rtas_addr;
>>> +
>>> + /* fetch rtas addr from fdt */
>>> + rtas_node = fdt_path_offset(fdt, "/rtas");
>>> + if (rtas_node == 0) {
>>> + return 0;
>>> + }
>>> +
>>> + rtas_addr_prop = fdt_get_property(fdt, rtas_node, "linux,rtas-base", NULL);
>>> + if (!rtas_addr_prop) {
>>
>> Just for curiosity: this is ok for linux, but what about other OSes (eg. AIX) ?
>>
>>> + return 0;
>>> + }
>>> +
>>> + rtas_addr = fdt32_to_cpu(*(uint32_t *)rtas_addr_prop->data);
>>
>> Also this assumes the OS called RTAS instantiate-rtas, but some other
>> OS might have called RTAS instantiate-rtas-64 instead. I guess it is
>> ok for now because SLOF only provides the 32-bit variant, but a
>> comment would certainly help IMHO.
>>
>>> + return (uint64_t)rtas_addr;
>>> +}
>>> +
>>> +
>>> static void core_rtas_register_types(void)
>>> {
>>> spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
>>> @@ -489,6 +546,10 @@ static void core_rtas_register_types(void)
>>> rtas_set_power_level);
>>> spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
>>> rtas_get_power_level);
>>> + spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
>>> + rtas_ibm_nmi_register);
>>> + spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
>>> + rtas_ibm_nmi_interlock);
>>> }
>>>
>>> type_init(core_rtas_register_types)
>>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
>>> index 7e32f30..ec6f33e 100644
>>> --- a/include/hw/ppc/spapr.h
>>> +++ b/include/hw/ppc/spapr.h
>>> @@ -187,6 +187,10 @@ struct SpaprMachineState {
>>> * occurs during the unplug process. */
>>> QTAILQ_HEAD(, SpaprDimmState) pending_dimm_unplugs;
>>>
>>> + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */
>>> + target_ulong guest_machine_check_addr;
>>> + QemuCond mc_delivery_cond;
>>> +
>>> /*< public >*/
>>> char *kvm_type;
>>> char *host_model;
>>> @@ -623,8 +627,10 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
>>> #define RTAS_IBM_CREATE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x27)
>>> #define RTAS_IBM_REMOVE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x28)
>>> #define RTAS_IBM_RESET_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x29)
>>> +#define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2A)
>>> +#define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2B)
>>>
>>> -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2A)
>>> +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2C)
>>>
>>> /* RTAS ibm,get-system-parameter token values */
>>> #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20
>>> @@ -874,4 +880,5 @@ void spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize,
>>> #define SPAPR_OV5_XIVE_BOTH 0x80 /* Only to advertise on the platform */
>>>
>>> void spapr_set_all_lpcrs(target_ulong value, target_ulong mask);
>>> +uint64_t spapr_get_rtas_addr(void);
>>> #endif /* HW_SPAPR_H */
>>>
>>>
>>
>>
>
--
Regards,
Aravinda
next prev parent reply other threads:[~2019-05-13 4:59 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-22 7:02 [Qemu-devel] [PATCH v8 0/6] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Aravinda Prasad
2019-04-22 7:02 ` Aravinda Prasad
2019-04-22 7:02 ` [Qemu-devel] [PATCH v8 1/6] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls Aravinda Prasad
2019-04-22 7:02 ` Aravinda Prasad
2019-04-23 6:45 ` David Gibson
2019-04-23 6:45 ` David Gibson
2019-04-25 4:56 ` Aravinda Prasad
2019-04-25 4:56 ` Aravinda Prasad
2019-05-10 9:06 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2019-05-10 9:54 ` David Gibson
2019-05-10 14:33 ` Greg Kurz
2019-05-13 4:57 ` Aravinda Prasad [this message]
2019-05-13 4:53 ` Aravinda Prasad
2019-04-22 7:03 ` [Qemu-devel] [PATCH v8 2/6] Wrapper function to wait on condition for the main loop mutex Aravinda Prasad
2019-04-22 7:03 ` Aravinda Prasad
2019-04-23 6:47 ` David Gibson
2019-04-23 6:47 ` David Gibson
2019-05-10 13:14 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2019-04-22 7:03 ` [Qemu-devel] [PATCH v8 3/6] target/ppc: Handle NMI guest exit Aravinda Prasad
2019-04-22 7:03 ` Aravinda Prasad
2019-04-23 6:53 ` David Gibson
2019-04-23 6:53 ` David Gibson
2019-04-24 4:50 ` [Qemu-devel] [Qemu-ppc] " Aravinda Prasad
2019-04-24 4:50 ` Aravinda Prasad
2019-05-10 6:37 ` David Gibson
2019-05-10 6:58 ` Aravinda Prasad
2019-05-10 16:25 ` Greg Kurz
2019-05-13 5:40 ` Aravinda Prasad
2019-05-13 5:56 ` David Gibson
2019-04-22 7:03 ` [Qemu-devel] [PATCH v8 4/6] target/ppc: Build rtas error log upon an MCE Aravinda Prasad
2019-04-22 7:03 ` Aravinda Prasad
2019-04-23 14:38 ` Fabiano Rosas
2019-04-23 14:38 ` Fabiano Rosas
2019-04-24 4:51 ` [Qemu-devel] [Qemu-ppc] " Aravinda Prasad
2019-04-24 4:51 ` Aravinda Prasad
2019-05-10 6:42 ` [Qemu-devel] " David Gibson
2019-05-10 7:05 ` Aravinda Prasad
2019-05-10 9:52 ` David Gibson
2019-05-13 5:00 ` Aravinda Prasad
2019-05-13 11:30 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2019-05-14 0:08 ` David Gibson
2019-05-14 4:26 ` Aravinda Prasad
2019-05-14 4:40 ` David Gibson
2019-05-14 5:06 ` Aravinda Prasad
2019-05-16 1:47 ` David Gibson
2019-05-16 4:54 ` Aravinda Prasad
2019-04-22 7:03 ` [Qemu-devel] [PATCH v8 5/6] ppc: spapr: Enable FWNMI capability Aravinda Prasad
2019-04-22 7:03 ` Aravinda Prasad
2019-05-10 6:46 ` David Gibson
2019-05-10 7:15 ` [Qemu-devel] [Qemu-ppc] " Aravinda Prasad
2019-05-10 9:53 ` David Gibson
2019-05-13 10:30 ` Aravinda Prasad
2019-05-14 4:47 ` David Gibson
2019-05-14 5:32 ` Aravinda Prasad
2019-05-16 1:45 ` David Gibson
2019-05-16 4:59 ` Aravinda Prasad
2019-04-22 7:03 ` [Qemu-devel] [PATCH v8 6/6] migration: Block migration while handling machine check Aravinda Prasad
2019-04-22 7:03 ` Aravinda Prasad
2019-05-10 6:51 ` David Gibson
2019-05-10 7:16 ` Aravinda Prasad
2019-05-29 5:46 ` [Qemu-devel] [Qemu-ppc] " Aravinda Prasad
2019-05-16 10:54 ` Greg Kurz
2019-05-16 10:59 ` Aravinda Prasad
2019-05-16 14:17 ` Dr. David Alan Gilbert
2019-05-20 5:57 ` Aravinda Prasad
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