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[176.184.27.70]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432b054aed6sm170869455e9.15.2024.11.11.04.02.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Nov 2024 04:02:44 -0800 (PST) Message-ID: <0efff9f3-6053-4e2d-80b5-27b4c86da813@linaro.org> Date: Mon, 11 Nov 2024 13:02:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v3 04/17] hw/net/xilinx_ethlite: Simplify by having configurable endianness To: Paolo Bonzini , qemu-devel@nongnu.org, Anton Johansson Cc: Jason Wang , Richard Henderson , devel@lists.libvirt.org, =?UTF-8?Q?Marc-Andr=C3=A9_Lureau?= , "Edgar E. Iglesias" , Thomas Huth , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Peter Maydell , Alistair Francis References: <20241108154317.12129-1-philmd@linaro.org> <20241108154317.12129-5-philmd@linaro.org> <71a10d65-dd73-4f39-93ee-2c36928f8f4f@redhat.com> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <71a10d65-dd73-4f39-93ee-2c36928f8f4f@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::22d; envelope-from=philmd@linaro.org; helo=mail-lj1-x22d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 8/11/24 16:05, Paolo Bonzini wrote: > On 11/8/24 16:43, Philippe Mathieu-Daudé wrote: >> The Xilinx 'ethlite' device was added in commit b43848a100 >> ("xilinx: Add ethlite emulation"), being only built back >> then for a big-endian MicroBlaze target (see commit 72b675caac >> "microblaze: Hook into the build-system"). >> >> I/O endianness access was then clarified in commit d48751ed4f >> ("xilinx-ethlite: Simplify byteswapping to/from brams"). Here >> the 'fix' was to use tswap32(). Since the machine was built as >> big-endian target, tswap32() use means the fix was for a little >> endian host. While the datasheet (reference added in file header) >> is not precise about it, we interpret such change as the device >> expects accesses in big-endian order. >> >> Instead of having a double swapping, one in the core memory layer >> due to DEVICE_NATIVE_ENDIAN and a second one with the tswap calls, >> allow the machine code to select the proper endianness desired, >> removing the need of tswap(). >> >> Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of >> DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN. >> Add the "little-endian" property to select the device endianness, >> defaulting to little endian. >> Set the proper endianness on the single machine using the device. >> >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> RFC until I digest Paolo's review from v1: >> https://lore.kernel.org/qemu-devel/34f6fe2f-06e0-4e2a-a361-2d662f6814b5@redhat.com/ > > tl;dr: this works but would break migration compatibility with the > previous version.  If you want to keep that, you need to add > >> -            r = tswap32(s->regs[addr]); >> +            r = s->regs[addr]; > > if (s->little_endian_model) >     r = cpu_to_le32(r); > else >     r = cpu_to_be32(r); > > >> @@ -161,23 +165,26 @@ eth_write(void *opaque, hwaddr addr, >>               break; >>           default: > > if (s->little_endian_model) >     r = le32_to_cpu(r); > else >     r = be32_to_cpu(r); > >> -            s->regs[addr] = tswap32(value); >> +            s->regs[addr] = value; >>               break; > > These pairs ensure that RAM goes through an even number of swaps.  I > don't think they are needed but you decide. Indeed; I didn't realize it was RAM. > However, I am wondering if the double MemoryRegionOps are needed *at > all*.  Since petalogix is arguably a little-endian only machine, can you > just use DEVICE_LITTLE_ENDIAN? 1/ This petalogix machine is actually built in the big-endian binary 2/ As Edgar mentioned elsewhere, Petalogic IP can be synthetized as big-endian 3/ This machine is used to prove we can remove the TARGET_BIG_ENDIAN definition and unify big/little endian binaries in our build system.