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[2003:f6:af13:1a00:27bd:20bf:c18c:447d]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3ee141e9cf7sm2209971f8f.12.2025.09.18.09.16.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Sep 2025 09:16:22 -0700 (PDT) Date: Thu, 18 Sep 2025 18:16:20 +0200 (CEST) From: Sebastian Ott To: Eric Auger cc: eric.auger.pro@gmail.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, Cornelia Huck , maz@kernel.org, oliver.upton@linux.dev, gshan@redhat.com Subject: Re: [RFC 1/3] target/arm/cpu: Add new CPU property for KVM regs to hide In-Reply-To: <20250911134324.3702720-2-eric.auger@redhat.com> Message-ID: <0f05a0ec-8b98-a9b7-6e3a-9ef73d0c34e7@redhat.com> References: <20250911134324.3702720-1-eric.auger@redhat.com> <20250911134324.3702720-2-eric.auger@redhat.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="-1463806286-295920147-1758212182=:37575" Received-SPF: pass client-ip=170.10.133.124; envelope-from=sebott@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.005, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. ---1463806286-295920147-1758212182=:37575 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8BIT On Thu, 11 Sep 2025, Eric Auger wrote: > New kernels sometimes expose new registers in an unconditionnal > manner. This situation breaks backward migration as qemu notices > there are more registers to store on guest than supported in the > destination kerenl. This leads to a "failed to load > cpu:cpreg_vmstate_array_len" error. > > A good example is the introduction of KVM_REG_ARM_VENDOR_HYP_BMAP_2 > pseudo FW register in v6.16 by commit C0000e58c74e (“KVM: arm64: > Introduce KVM_REG_ARM_VENDOR_HYP_BMAP_2”). Trying to do backward > migration from a host kernel which features the commit to a destination > host that doesn't fail. > > Currently QEMU is not using that feature so ignoring this latter > is not a problem. An easy way to fix the migration issue is to teach > qemu we don't care about that register and we can simply ignore it, > including its state migration. > > This patch introduces a CPU property, under the form of an array of > reg indices which indicates which registers can be ignored. > > The goal then is to set this property in machine type compats such > as: > static GlobalProperty arm_virt_kernel_compat_10_1[] = { > /* KVM_REG_ARM_VENDOR_HYP_BMAP_2 */ > { TYPE_ARM_CPU, "kvm-hidden-regs", "0x6030000000160003" }, > } One thing worth noting - once this series lands: https://lore.kernel.org/qemu-devel/20250801074730.28329-1-shameerkolothum@gmail.com/ we might need to add a bit more logic here. Either using the kvm interfaces (only ignore KVM_REG_ARM_VENDOR_HYP_BMAP_2 when the register value is 0) or qemu knowledge (only ignore KVM_REG_ARM_VENDOR_HYP_BMAP_2 when the impl-cpu property is not used). Sebastian ---1463806286-295920147-1758212182=:37575--