From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: BALATON Zoltan <balaton@eik.bme.hu>, qemu-devel@nongnu.org
Cc: Corey Minyard <cminyard@mvista.com>
Subject: Re: [PATCH] i2c/smbus_eeprom: Add minimum write recovery time for DDR2
Date: Mon, 20 Oct 2025 11:22:15 +0200 [thread overview]
Message-ID: <102a9874-27db-4073-b4ff-dddeb450ff5e@linaro.org> (raw)
In-Reply-To: <20251008122502.9DA8956F301@zero.eik.bme.hu>
On 8/10/25 14:25, BALATON Zoltan wrote:
> This is needed for newer u-boot-sam460ex versions to pass the DRAM
> setup.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
> hw/i2c/smbus_eeprom.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c
> index 0a1088fbb0..26e211b31a 100644
> --- a/hw/i2c/smbus_eeprom.c
> +++ b/hw/i2c/smbus_eeprom.c
> @@ -288,6 +288,7 @@ uint8_t *spd_data_generate(enum sdram_type type, ram_addr_t ram_size)
> spd[33] = 8; /* addr/cmd hold time */
> spd[34] = 20; /* data input setup time */
> spd[35] = 8; /* data input hold time */
> + spd[36] = (type == DDR2 ? 13 << 2 : 0); /* min. write recovery time */
We are adapting DDR2 values on a method written for SDR/DDR[1].
Better would be to split and correctly document each format,
using proper values.
Anyhow, for this patch:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2025-10-20 9:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-08 12:25 [PATCH] i2c/smbus_eeprom: Add minimum write recovery time for DDR2 BALATON Zoltan
2025-10-18 11:27 ` BALATON Zoltan
2025-10-20 9:22 ` Philippe Mathieu-Daudé [this message]
2025-10-20 14:03 ` BALATON Zoltan
2025-10-20 20:11 ` Philippe Mathieu-Daudé
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