From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, kraxel@redhat.com, edgar.iglesias@gmail.com
Subject: [Qemu-devel] [PATCH v4 4/6] register: Add support for decoding information
Date: Wed, 9 Apr 2014 00:17:26 -0700 [thread overview]
Message-ID: <1037f76d874b55d8ad838a5004affc1e900b67ae.1397024123.git.peter.crosthwaite@xilinx.com> (raw)
In-Reply-To: <cover.1397024123.git.peter.crosthwaite@xilinx.com>
Allow defining of optional address decoding information in register
definitions. This is useful for clients that want to associate
registers with specific addresses.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---
include/hw/register.h | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/include/hw/register.h b/include/hw/register.h
index c595ed6..d7f602f 100644
--- a/include/hw/register.h
+++ b/include/hw/register.h
@@ -15,6 +15,7 @@
typedef struct RegisterInfo RegisterInfo;
typedef struct RegisterAccessInfo RegisterAccessInfo;
+typedef struct RegisterDecodeInfo RegisterDecodeInfo;
/**
* A register access error message
@@ -54,6 +55,11 @@ typedef struct RegisterAccessError {
* allowing this function to modify the value before return to the client.
*/
+#define REG_DECODE_READ (1 << 0)
+#define REG_DECODE_WRITE (1 << 1)
+#define REG_DECODE_EXECUTE (1 << 2)
+#define REG_DECODE_RW (REG_DECODE_READ | REG_DECODE_WRITE)
+
struct RegisterAccessInfo {
const char *name;
uint64_t ro;
@@ -71,6 +77,14 @@ struct RegisterAccessInfo {
void (*post_write)(RegisterInfo *reg, uint64_t val);
uint64_t (*post_read)(RegisterInfo *reg, uint64_t val);
+
+ size_t storage;
+ int data_size;
+
+ struct {
+ hwaddr addr;
+ uint8_t flags;
+ } decode;
};
/**
@@ -108,6 +122,13 @@ struct RegisterInfo {
MemoryRegion mem;
};
+
+struct RegisterDecodeInfo {
+ RegisterInfo *reg;
+ hwaddr addr;
+ unsigned len;
+};
+
/**
* write a value to a register, subject to its restrictions
* @reg: register to write to
--
1.9.1.1.gbb9f595
next prev parent reply other threads:[~2014-04-09 7:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-09 7:15 [Qemu-devel] [PATCH v4 0/6] Data Driven device registers + Zynq DEVCFG Peter Crosthwaite
2014-04-09 7:15 ` [Qemu-devel] [PATCH v4 1/6] bitops: Add ONES macro Peter Crosthwaite
2014-04-09 7:16 ` [Qemu-devel] [PATCH v4 2/6] register: Add Register API Peter Crosthwaite
2014-04-09 7:16 ` [Qemu-devel] [PATCH v4 3/6] register: Add Memory API glue Peter Crosthwaite
2014-04-09 7:17 ` Peter Crosthwaite [this message]
2014-04-09 7:18 ` [Qemu-devel] [PATCH v4 5/6] xilinx_devcfg: Zynq devcfg device model Peter Crosthwaite
2014-04-09 7:18 ` [Qemu-devel] [PATCH v4 6/6] xilinx_zynq: added devcfg to machine model Peter Crosthwaite
[not found] ` <CAEgOgz44H0wneRDxUrsvtLNtVD3iNAfL28VmAhYURGG95kh93g@mail.gmail.com>
2014-05-05 23:42 ` [Qemu-devel] [PATCH v4 0/6] Data Driven device registers + Zynq DEVCFG Peter Crosthwaite
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