From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by monty-python.gnu.org with tmda-scanned (Exim 4.24) id 1AM8JS-0002rV-Jn for qemu-devel@nongnu.org; Tue, 18 Nov 2003 11:02:46 -0500 Received: from mail by monty-python.gnu.org with spam-scanned (Exim 4.24) id 1AM8Iw-0002kz-Bd for qemu-devel@nongnu.org; Tue, 18 Nov 2003 11:02:45 -0500 Received: from [62.210.158.46] (helo=teheran.magic.fr) by monty-python.gnu.org with esmtp (Exim 4.24) id 1AM8Iv-0002kW-9D for qemu-devel@nongnu.org; Tue, 18 Nov 2003 11:02:13 -0500 Received: from jma1.dev.netgem.com (gw.netgem.com [195.68.2.34]) by teheran.magic.fr (8.11.6/8.11.2) with ESMTP id hAIF0ee16104 for ; Tue, 18 Nov 2003 16:00:40 +0100 (CET) Subject: Re: [Qemu-devel] [ADD] PPC processor emulation From: Jocelyn Mayer In-Reply-To: References: <20031117105133.7e856e56.Jens.Arm@gmx.de> <1069140512.14646.2174.camel@rapid> <1069151842.13659.2338.camel@rapid> Content-Type: text/plain Message-Id: <1069167598.1768.47.camel@jma1.dev.netgem.com> Mime-Version: 1.0 Date: 18 Nov 2003 15:59:58 +0100 Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu mailing list On Tue, 2003-11-18 at 13:24, Gwenole Beauchesne wrote: > On Tue, 18 Nov 2003, J. Mayer wrote: > > > > I have a test program that covers around 600K variants with specific > > > values to trigger flags updates. It requires a PPC host for now to > > > validate results. It helped a lot to first write a correct interpreter and > > > discover some hidden semantics in rare cases. > > > > > The program, ppc_test does this with a lot of different instruction, > > using a huge set of values. With the ctrace program, I could check that > > it runs the same on my Ibook and on my PC with qemu. Where could I find > > yours to make more tests ? > > An oldish version is available here: > > > I will commit a newer version tonight. The "JIT1" engine is not committed > yet either. Well, I'll take a look... and 'll try qemu with this test ! > > You found hidden semantics, as you say. What is confusing, also, is that > > Motorola's implementation isn't the same than IBM's one for some strange > > cases... > > Nevermind, you got divw implementation right at first sight, so forget > about it. ;-) There are some strange things with string and load/store multiples too: IBM allows the memory operand to be in the range of loaded registers as Motorolla says this is invalid. IBM says this reg won't be modified. I'm sure my implementation is false for both point of vues ! > > My TBL/TBU implementation isn't a real time clock, but is a cycle > > counter, as on "real" PPC. > > Doesn't a real PPC increments TBR after a time comparable to at least 4 > addi instructions? I think there was an Apple TN# about it. In fact, I though the spec said that it increments at each clock tick, but I just checked and I see: "The VEA does not specify a relathionship between the frequency at which the time base is updated and other clocks, such as the processor clock. The TB update frequency is not required to be constant; ... one of two things is required: * the system provides an implementation dependant exception to software whenever the update frequency of the time base changes and a means to determine the current update frequency or * the system software controls the update frequency of the time base" So things aren't so simple... I wonder if MacOS would run on all PPCs... -- Jocelyn Mayer Never organized