Re: [Qemu-devel] PowerPC CPU tester

["J. Mayer" <l_indien@magic.fr>]

On Tue, 2003-12-02 at 16:13, Gwenole Beauchesne wrote:
> Hi,
> 
> I have finally glued QEMU to my test engine. Extra patches to QEMU core
> are appended below.
> 
> You can find the files here:
> <http://gwenole.beauchesne.free.fr/kheperix/>
> * test-powerpc.cpp
> * kheperix-0.2-ppc-results.dat.bz2: results file for non PPC platforms
> 
> The tester is old but covers around 690K variations (1.3M nowadays):
> 154656 errors out of 689408 tests
> 
> Most of them are due to miscalculation of the overflow flag. "neg" is 
> probably mis-decoded thus not handling CR or XER updates. Should be pretty 
> simple to fix.
>
Hi, 

Thanks for testing.
I'm surprised that you have problems with standard arithmetics and
logical tests, as I did test a lot of cases with my ppc-test programs
which gives the same result on a real PPC (G3 & G4) and under qemu.
Would it be possible to get a readable description of the problems
encountered ?
I can do nothing of you .dat file.
I also pass the U-boot cpu post test, 
with some fixes for string load/store and
rlwmi instructions.

I did ran your test, and the translation stops for "neg" instruction
because you generate invalid forms of this instruction:

> Testing neg
> invalid bits: 00002800 for opcode: 1f -08 - 03 (0x7c6428d0) (0x80031890)
According to PPC specification, bits 16 to 20 (in IBM/Motorola notation) have
always to be zero, has neg have no rB operand.
This can be fixed easily in your program, replacing rB with zero for neg variants
tests.
With that fix, I get this result (with the version I work on, not the commited one):
0 errors out of 663056 tests
I did fix only string/multiple load & store and rlwimi instruction...

> Index: target-ppc/translate.c
> ===================================================================
> RCS file: /cvsroot/qemu/qemu/target-ppc/translate.c,v
> retrieving revision 1.2
> diff -u -r1.2 translate.c
> --- target-ppc/translate.c	23 Nov 2003 16:58:08 -0000	1.2
> +++ target-ppc/translate.c	2 Dec 2003 14:50:20 -0000
> @@ -22,6 +22,7 @@
>  #include "exec.h"
>  #include "disas.h"
>  
> +#define DO_EXEC_RETURN
>  //#define DO_SINGLE_STEP
>  //#define DO_STEP_FLUSH
>  
> @@ -2336,6 +2337,12 @@
>                  handler = table[opc3(ctx.opcode)];
>              }
>          }
> +#ifdef DO_EXEC_RETURN
> +		if (ctx.opcode == 0x18000000) {
> +		  gen_op_raise_exception(EXCP_HLT);
> +		  break;
> +		}
> +#endif
>          /* Is opcode *REALLY* valid ? */
>          if ((ctx.opcode & handler->inval) != 0) {
>              if (loglevel > 0) {
> 
What does this mean ?
I cannot see this opcode either in the 32 bits PPC spec, or in the PPC
750 one... Did I miss
something ?

Regards.

-- 
J. Mayer <l_indien@magic.fr>
Never organized