[PATCH 0/9] target/hppa: Remove use of MO_TE definition

[PATCH 0/9] target/hppa: Remove use of MO_TE definition

[Philippe Mathieu-Daudé]

- Replace a pair of target_ulong types
- Replace MO_TE -> MO_BE

Philippe Mathieu-Daudé (9):
  target/hppa: Use hwaddr type for HPPATLBEntry::pa
  target/hppa: Have hppa_form_gva*() return vaddr type
  target/hppa: Explode MO_TExx -> MO_TE | MO_xx
  target/hppa: Conceal MO_TE within do_load()
  target/hppa: Conceal MO_TE within do_load_32/64()
  target/hppa: Conceal MO_TE within do_store()
  target/hppa: Conceal MO_TE within do_store_32/64()
  target/hppa: Introduce mo_endian() helper
  target/hppa: Replace MO_TE -> MO_BE

 target/hppa/cpu.h        |  6 +++---
 target/hppa/helper.c     |  4 ++--
 target/hppa/mem_helper.c |  2 +-
 target/hppa/translate.c  | 23 ++++++++++++++++-------
 target/hppa/trace-events |  6 +++---
 5 files changed, 25 insertions(+), 16 deletions(-)

-- 
2.51.0

[PATCH 1/9] target/hppa: Use hwaddr type for HPPATLBEntry::pa

[Philippe Mathieu-Daudé]

HPPATLBEntry::@pa is a physical address, use the appropriate type.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/hppa/cpu.h        | 2 +-
 target/hppa/trace-events | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 672ab3750c8..869a75876e2 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -187,7 +187,7 @@ typedef struct HPPATLBEntry {
         struct HPPATLBEntry *unused_next;
     };
 
-    target_ulong pa;
+    hwaddr pa;
 
     unsigned entry_valid : 1;
 
diff --git a/target/hppa/trace-events b/target/hppa/trace-events
index a10ba73d5d4..01761a4559b 100644
--- a/target/hppa/trace-events
+++ b/target/hppa/trace-events
@@ -1,13 +1,13 @@
 # See docs/devel/tracing.rst for syntax documentation.
 
 # mem_helper.c
-disable hppa_tlb_flush_ent(void *env, void *ent, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p va_b=0x%lx va_e=0x%lx pa=0x%lx"
-disable hppa_tlb_find_entry(void *env, void *ent, int valid, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p valid=%d va_b=0x%lx va_e=0x%lx pa=0x%lx"
+disable hppa_tlb_flush_ent(void *env, void *ent, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p va_b=0x%lx va_e=0x%lx pa=0x%" PRIx64
+disable hppa_tlb_find_entry(void *env, void *ent, int valid, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p valid=%d va_b=0x%lx va_e=0x%lx pa=0x%" PRIx64
 disable hppa_tlb_find_entry_not_found(void *env, uint64_t addr) "env=%p addr=%08lx"
 disable hppa_tlb_get_physical_address(void *env, int ret, int prot, uint64_t addr, uint64_t phys) "env=%p ret=%d prot=%d addr=0x%lx phys=0x%lx"
 disable hppa_tlb_fill_excp(void *env, uint64_t addr, int size, int type, int mmu_idx) "env=%p addr=0x%lx size=%d type=%d mmu_idx=%d"
 disable hppa_tlb_fill_success(void *env, uint64_t addr, uint64_t phys, int size, int type, int mmu_idx) "env=%p addr=0x%lx phys=0x%lx size=%d type=%d mmu_idx=%d"
-disable hppa_tlb_itlba(void *env, void *ent, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p va_b=0x%lx va_e=0x%lx pa=0x%lx"
+disable hppa_tlb_itlba(void *env, void *ent, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p va_b=0x%lx va_e=0x%lx pa=0x%" PRIx64
 disable hppa_tlb_itlbp(void *env, void *ent, int access_id, int u, int pl2, int pl1, int type, int b, int d, int t) "env=%p ent=%p access_id=%x u=%d pl2=%d pl1=%d type=%d b=%d d=%d t=%d"
 disable hppa_tlb_ptlb(void *env) "env=%p"
 disable hppa_tlb_ptlb_local(void *env) "env=%p"
-- 
2.51.0

[PATCH 2/9] target/hppa: Have hppa_form_gva*() return vaddr type

[Philippe Mathieu-Daudé]

Return a 'vaddr' type for "guest virtual address".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/hppa/cpu.h        | 4 ++--
 target/hppa/helper.c     | 4 ++--
 target/hppa/mem_helper.c | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 869a75876e2..e14f238827b 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -320,7 +320,7 @@ void hppa_translate_code(CPUState *cs, TranslationBlock *tb,
 
 #define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
 
-static inline target_ulong hppa_form_gva_mask(uint64_t gva_offset_mask,
+static inline vaddr hppa_form_gva_mask(uint64_t gva_offset_mask,
                                         uint64_t spc, target_ulong off)
 {
 #ifdef CONFIG_USER_ONLY
@@ -330,7 +330,7 @@ static inline target_ulong hppa_form_gva_mask(uint64_t gva_offset_mask,
 #endif
 }
 
-static inline target_ulong hppa_form_gva(CPUHPPAState *env, uint64_t spc,
+static inline vaddr hppa_form_gva(CPUHPPAState *env, uint64_t spc,
                                          target_ulong off)
 {
     return hppa_form_gva_mask(env->gva_offset_mask, spc, off);
diff --git a/target/hppa/helper.c b/target/hppa/helper.c
index d7f8495d982..edcd2bf27c8 100644
--- a/target/hppa/helper.c
+++ b/target/hppa/helper.c
@@ -148,8 +148,8 @@ void hppa_cpu_dump_state(CPUState *cs, FILE *f, int flags)
         m = UINT32_MAX;
     }
 
-    qemu_fprintf(f, "IA_F %08" PRIx64 ":%0*" PRIx64 " (" TARGET_FMT_lx ")\n"
-                    "IA_B %08" PRIx64 ":%0*" PRIx64 " (" TARGET_FMT_lx ")\n",
+    qemu_fprintf(f, "IA_F %08" PRIx64 ":%0*" PRIx64 " (0x%" VADDR_PRIx ")\n"
+                    "IA_B %08" PRIx64 ":%0*" PRIx64 " (0x%" VADDR_PRIx ")\n",
                  env->iasq_f >> 32, w, m & env->iaoq_f,
                  hppa_form_gva_mask(env->gva_offset_mask, env->iasq_f,
 				    env->iaoq_f),
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index 9bdd0a6f23d..cce82e65999 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -803,7 +803,7 @@ void HELPER(diag_btlb)(CPUHPPAState *env)
 
 uint64_t HELPER(b_gate_priv)(CPUHPPAState *env, uint64_t iaoq_f)
 {
-    uint64_t gva = hppa_form_gva(env, env->iasq_f, iaoq_f);
+    vaddr gva = hppa_form_gva(env, env->iasq_f, iaoq_f);
     HPPATLBEntry *ent = hppa_find_tlb(env, gva);
 
     if (ent == NULL) {
-- 
2.51.0

[PATCH 3/9] target/hppa: Explode MO_TExx -> MO_TE | MO_xx

[Philippe Mathieu-Daudé]

Extract the implicit MO_TE definition in order to replace
it in a commits.

Mechanical change using:

  $ for n in UW UL UQ UO SW SL SQ; do \
      sed -i -e "s/MO_TE$n/MO_TE | MO_$n/" \
           $(git grep -l MO_TE$n target/openrisc); \
    done

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/hppa/translate.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 7a81cfcb887..859c6cf5f9b 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -1691,7 +1691,7 @@ static bool do_floadw(DisasContext *ctx, unsigned rt, unsigned rb,
     nullify_over(ctx);
 
     tmp = tcg_temp_new_i32();
-    do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TEUL);
+    do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UL);
     save_frw_i32(rt, tmp);
 
     if (rt == 0) {
@@ -1716,7 +1716,7 @@ static bool do_floadd(DisasContext *ctx, unsigned rt, unsigned rb,
     nullify_over(ctx);
 
     tmp = tcg_temp_new_i64();
-    do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TEUQ);
+    do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UQ);
     save_frd(rt, tmp);
 
     if (rt == 0) {
@@ -1750,7 +1750,7 @@ static bool do_fstorew(DisasContext *ctx, unsigned rt, unsigned rb,
     nullify_over(ctx);
 
     tmp = load_frw_i32(rt);
-    do_store_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TEUL);
+    do_store_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UL);
 
     return nullify_end(ctx);
 }
@@ -1770,7 +1770,7 @@ static bool do_fstored(DisasContext *ctx, unsigned rt, unsigned rb,
     nullify_over(ctx);
 
     tmp = load_frd(rt);
-    do_store_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TEUQ);
+    do_store_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UQ);
 
     return nullify_end(ctx);
 }
-- 
2.51.0

[PATCH 4/9] target/hppa: Conceal MO_TE within do_load()

[Philippe Mathieu-Daudé]

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/hppa/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 859c6cf5f9b..ee0c874342c 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -1676,7 +1676,7 @@ static bool do_load(DisasContext *ctx, unsigned rt, unsigned rb,
         /* Make sure if RT == RB, we see the result of the load.  */
         dest = tcg_temp_new_i64();
     }
-    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, mop);
+    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, MO_TE | mop);
     save_gpr(ctx, rt, dest);
 
     return nullify_end(ctx);
@@ -3302,7 +3302,7 @@ static bool trans_ld(DisasContext *ctx, arg_ldst *a)
         return gen_illegal(ctx);
     }
     return do_load(ctx, a->t, a->b, a->x, a->scale ? a->size : 0,
-                   a->disp, a->sp, a->m, a->size | MO_TE);
+                   a->disp, a->sp, a->m, a->size);
 }
 
 static bool trans_st(DisasContext *ctx, arg_ldst *a)
-- 
2.51.0

[PATCH 5/9] target/hppa: Conceal MO_TE within do_load_32/64()

[Philippe Mathieu-Daudé]

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/hppa/translate.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index ee0c874342c..4680d826345 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -1599,6 +1599,7 @@ static void do_load_32(DisasContext *ctx, TCGv_i32 dest, unsigned rb,
     /* Caller uses nullify_over/nullify_end.  */
     assert(ctx->null_cond.c == TCG_COND_NEVER);
 
+    mop |= MO_TE;
     form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
              MMU_DISABLED(ctx));
     tcg_gen_qemu_ld_i32(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1617,6 +1618,7 @@ static void do_load_64(DisasContext *ctx, TCGv_i64 dest, unsigned rb,
     /* Caller uses nullify_over/nullify_end.  */
     assert(ctx->null_cond.c == TCG_COND_NEVER);
 
+    mop |= MO_TE;
     form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
              MMU_DISABLED(ctx));
     tcg_gen_qemu_ld_i64(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1676,7 +1678,7 @@ static bool do_load(DisasContext *ctx, unsigned rt, unsigned rb,
         /* Make sure if RT == RB, we see the result of the load.  */
         dest = tcg_temp_new_i64();
     }
-    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, MO_TE | mop);
+    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, mop);
     save_gpr(ctx, rt, dest);
 
     return nullify_end(ctx);
@@ -1691,7 +1693,7 @@ static bool do_floadw(DisasContext *ctx, unsigned rt, unsigned rb,
     nullify_over(ctx);
 
     tmp = tcg_temp_new_i32();
-    do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UL);
+    do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UL);
     save_frw_i32(rt, tmp);
 
     if (rt == 0) {
@@ -1716,7 +1718,7 @@ static bool do_floadd(DisasContext *ctx, unsigned rt, unsigned rb,
     nullify_over(ctx);
 
     tmp = tcg_temp_new_i64();
-    do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UQ);
+    do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UQ);
     save_frd(rt, tmp);
 
     if (rt == 0) {
-- 
2.51.0

[PATCH 6/9] target/hppa: Conceal MO_TE within do_store()

[Philippe Mathieu-Daudé]

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/hppa/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 4680d826345..3f78bb2a76a 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -1739,7 +1739,7 @@ static bool do_store(DisasContext *ctx, unsigned rt, unsigned rb,
                      int modify, MemOp mop)
 {
     nullify_over(ctx);
-    do_store_64(ctx, load_gpr(ctx, rt), rb, 0, 0, disp, sp, modify, mop);
+    do_store_64(ctx, load_gpr(ctx, rt), rb, 0, 0, disp, sp, modify, MO_TE | mop);
     return nullify_end(ctx);
 }
 
@@ -3313,7 +3313,7 @@ static bool trans_st(DisasContext *ctx, arg_ldst *a)
     if (!ctx->is_pa20 && a->size > MO_32) {
         return gen_illegal(ctx);
     }
-    return do_store(ctx, a->t, a->b, a->disp, a->sp, a->m, a->size | MO_TE);
+    return do_store(ctx, a->t, a->b, a->disp, a->sp, a->m, a->size);
 }
 
 static bool trans_ldc(DisasContext *ctx, arg_ldst *a)
-- 
2.51.0

[PATCH 7/9] target/hppa: Conceal MO_TE within do_store_32/64()

[Philippe Mathieu-Daudé]

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/hppa/translate.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 3f78bb2a76a..92071affe47 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -1637,6 +1637,7 @@ static void do_store_32(DisasContext *ctx, TCGv_i32 src, unsigned rb,
     /* Caller uses nullify_over/nullify_end.  */
     assert(ctx->null_cond.c == TCG_COND_NEVER);
 
+    mop |= MO_TE;
     form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
              MMU_DISABLED(ctx));
     tcg_gen_qemu_st_i32(src, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1655,6 +1656,7 @@ static void do_store_64(DisasContext *ctx, TCGv_i64 src, unsigned rb,
     /* Caller uses nullify_over/nullify_end.  */
     assert(ctx->null_cond.c == TCG_COND_NEVER);
 
+    mop |= MO_TE;
     form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
              MMU_DISABLED(ctx));
     tcg_gen_qemu_st_i64(src, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1739,7 +1741,7 @@ static bool do_store(DisasContext *ctx, unsigned rt, unsigned rb,
                      int modify, MemOp mop)
 {
     nullify_over(ctx);
-    do_store_64(ctx, load_gpr(ctx, rt), rb, 0, 0, disp, sp, modify, MO_TE | mop);
+    do_store_64(ctx, load_gpr(ctx, rt), rb, 0, 0, disp, sp, modify, mop);
     return nullify_end(ctx);
 }
 
@@ -1752,7 +1754,7 @@ static bool do_fstorew(DisasContext *ctx, unsigned rt, unsigned rb,
     nullify_over(ctx);
 
     tmp = load_frw_i32(rt);
-    do_store_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UL);
+    do_store_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UL);
 
     return nullify_end(ctx);
 }
@@ -1772,7 +1774,7 @@ static bool do_fstored(DisasContext *ctx, unsigned rt, unsigned rb,
     nullify_over(ctx);
 
     tmp = load_frd(rt);
-    do_store_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UQ);
+    do_store_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UQ);
 
     return nullify_end(ctx);
 }
-- 
2.51.0

[PATCH 8/9] target/hppa: Introduce mo_endian() helper

[Philippe Mathieu-Daudé]

mo_endian() returns the target endianness.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/hppa/translate.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 92071affe47..6fec63cb433 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -104,6 +104,11 @@ typedef struct DisasContext {
 #define MMU_DISABLED(C)  MMU_IDX_MMU_DISABLED((C)->mmu_idx)
 #endif
 
+static inline MemOp mo_endian(DisasContext *ctx)
+{
+    return MO_TE;
+}
+
 /* Note that ssm/rsm instructions number PSW_W and PSW_E differently.  */
 static int expand_sm_imm(DisasContext *ctx, int val)
 {
@@ -1599,7 +1604,7 @@ static void do_load_32(DisasContext *ctx, TCGv_i32 dest, unsigned rb,
     /* Caller uses nullify_over/nullify_end.  */
     assert(ctx->null_cond.c == TCG_COND_NEVER);
 
-    mop |= MO_TE;
+    mop |= mo_endian(ctx);
     form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
              MMU_DISABLED(ctx));
     tcg_gen_qemu_ld_i32(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1618,7 +1623,7 @@ static void do_load_64(DisasContext *ctx, TCGv_i64 dest, unsigned rb,
     /* Caller uses nullify_over/nullify_end.  */
     assert(ctx->null_cond.c == TCG_COND_NEVER);
 
-    mop |= MO_TE;
+    mop |= mo_endian(ctx);
     form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
              MMU_DISABLED(ctx));
     tcg_gen_qemu_ld_i64(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1637,7 +1642,7 @@ static void do_store_32(DisasContext *ctx, TCGv_i32 src, unsigned rb,
     /* Caller uses nullify_over/nullify_end.  */
     assert(ctx->null_cond.c == TCG_COND_NEVER);
 
-    mop |= MO_TE;
+    mop |= mo_endian(ctx);
     form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
              MMU_DISABLED(ctx));
     tcg_gen_qemu_st_i32(src, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1656,7 +1661,7 @@ static void do_store_64(DisasContext *ctx, TCGv_i64 src, unsigned rb,
     /* Caller uses nullify_over/nullify_end.  */
     assert(ctx->null_cond.c == TCG_COND_NEVER);
 
-    mop |= MO_TE;
+    mop |= mo_endian(ctx);
     form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
              MMU_DISABLED(ctx));
     tcg_gen_qemu_st_i64(src, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -3320,7 +3325,7 @@ static bool trans_st(DisasContext *ctx, arg_ldst *a)
 
 static bool trans_ldc(DisasContext *ctx, arg_ldst *a)
 {
-    MemOp mop = MO_TE | MO_ALIGN | a->size;
+    MemOp mop = mo_endian(ctx) | MO_ALIGN | a->size;
     TCGv_i64 dest, ofs;
     TCGv_i64 addr;
 
-- 
2.51.0

[PATCH 9/9] target/hppa: Replace MO_TE -> MO_BE

[Philippe Mathieu-Daudé]

We only build the PA-RISC targets using big endianness order:

  $ git grep TARGET_BIG_ENDIAN configs/targets/hppa-*
  configs/targets/hppa-linux-user.mak:5:TARGET_BIG_ENDIAN=y
  configs/targets/hppa-softmmu.mak:2:TARGET_BIG_ENDIAN=y

Therefore the MO_TE definition always expands to MO_BE. Use the
latter to simplify.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/hppa/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 6fec63cb433..c9009441ad0 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -106,7 +106,7 @@ typedef struct DisasContext {
 
 static inline MemOp mo_endian(DisasContext *ctx)
 {
-    return MO_TE;
+    return MO_BE;
 }
 
 /* Note that ssm/rsm instructions number PSW_W and PSW_E differently.  */
-- 
2.51.0

Re: [PATCH 1/9] target/hppa: Use hwaddr type for HPPATLBEntry::pa

[Richard Henderson]

On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
> HPPATLBEntry::@pa is a physical address, use the appropriate type.
> 
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
>   target/hppa/cpu.h        | 2 +-
>   target/hppa/trace-events | 6 +++---
>   2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
> index 672ab3750c8..869a75876e2 100644
> --- a/target/hppa/cpu.h
> +++ b/target/hppa/cpu.h
> @@ -187,7 +187,7 @@ typedef struct HPPATLBEntry {
>           struct HPPATLBEntry *unused_next;
>       };
>   
> -    target_ulong pa;
> +    hwaddr pa;
>   
>       unsigned entry_valid : 1;
>   

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 2/9] target/hppa: Have hppa_form_gva*() return vaddr type

[Richard Henderson]

On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
> Return a 'vaddr' type for "guest virtual address".
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/hppa/cpu.h        | 4 ++--
>   target/hppa/helper.c     | 4 ++--
>   target/hppa/mem_helper.c | 2 +-
>   3 files changed, 5 insertions(+), 5 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

> 
> diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
> index 869a75876e2..e14f238827b 100644
> --- a/target/hppa/cpu.h
> +++ b/target/hppa/cpu.h
> @@ -320,7 +320,7 @@ void hppa_translate_code(CPUState *cs, TranslationBlock *tb,
>   
>   #define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
>   
> -static inline target_ulong hppa_form_gva_mask(uint64_t gva_offset_mask,
> +static inline vaddr hppa_form_gva_mask(uint64_t gva_offset_mask,
>                                           uint64_t spc, target_ulong off)

But indentation needs fixing on the second line.

>   {
>   #ifdef CONFIG_USER_ONLY
> @@ -330,7 +330,7 @@ static inline target_ulong hppa_form_gva_mask(uint64_t gva_offset_mask,
>   #endif
>   }
>   
> -static inline target_ulong hppa_form_gva(CPUHPPAState *env, uint64_t spc,
> +static inline vaddr hppa_form_gva(CPUHPPAState *env, uint64_t spc,
>                                            target_ulong off)

Likewise.


r~

Re: [PATCH 3/9] target/hppa: Explode MO_TExx -> MO_TE | MO_xx

[Richard Henderson]

On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
> Extract the implicit MO_TE definition in order to replace
> it in a commits.
> 
> Mechanical change using:
> 
>    $ for n in UW UL UQ UO SW SL SQ; do \
>        sed -i -e "s/MO_TE$n/MO_TE | MO_$n/" \
>             $(git grep -l MO_TE$n target/openrisc); \
>      done
> 
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
>   target/hppa/translate.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 4/9] target/hppa: Conceal MO_TE within do_load()

[Richard Henderson]

On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/hppa/translate.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index 859c6cf5f9b..ee0c874342c 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -1676,7 +1676,7 @@ static bool do_load(DisasContext *ctx, unsigned rt, unsigned rb,
>           /* Make sure if RT == RB, we see the result of the load.  */
>           dest = tcg_temp_new_i64();
>       }
> -    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, mop);
> +    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, MO_TE | mop);
>       save_gpr(ctx, rt, dest);
>   
>       return nullify_end(ctx);
> @@ -3302,7 +3302,7 @@ static bool trans_ld(DisasContext *ctx, arg_ldst *a)
>           return gen_illegal(ctx);
>       }
>       return do_load(ctx, a->t, a->b, a->x, a->scale ? a->size : 0,
> -                   a->disp, a->sp, a->m, a->size | MO_TE);
> +                   a->disp, a->sp, a->m, a->size);
>   }
>   
>   static bool trans_st(DisasContext *ctx, arg_ldst *a)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 5/9] target/hppa: Conceal MO_TE within do_load_32/64()

[Richard Henderson]

On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/hppa/translate.c | 8 +++++---
>   1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index ee0c874342c..4680d826345 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -1599,6 +1599,7 @@ static void do_load_32(DisasContext *ctx, TCGv_i32 dest, unsigned rb,
>       /* Caller uses nullify_over/nullify_end.  */
>       assert(ctx->null_cond.c == TCG_COND_NEVER);
>   
> +    mop |= MO_TE;
>       form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
>                MMU_DISABLED(ctx));
>       tcg_gen_qemu_ld_i32(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
> @@ -1617,6 +1618,7 @@ static void do_load_64(DisasContext *ctx, TCGv_i64 dest, unsigned rb,
>       /* Caller uses nullify_over/nullify_end.  */
>       assert(ctx->null_cond.c == TCG_COND_NEVER);
>   
> +    mop |= MO_TE;
>       form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
>                MMU_DISABLED(ctx));
>       tcg_gen_qemu_ld_i64(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
> @@ -1676,7 +1678,7 @@ static bool do_load(DisasContext *ctx, unsigned rt, unsigned rb,
>           /* Make sure if RT == RB, we see the result of the load.  */
>           dest = tcg_temp_new_i64();
>       }
> -    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, MO_TE | mop);
> +    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, mop);
>       save_gpr(ctx, rt, dest);
>   
>       return nullify_end(ctx);
> @@ -1691,7 +1693,7 @@ static bool do_floadw(DisasContext *ctx, unsigned rt, unsigned rb,
>       nullify_over(ctx);
>   
>       tmp = tcg_temp_new_i32();
> -    do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UL);
> +    do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UL);
>       save_frw_i32(rt, tmp);
>   
>       if (rt == 0) {
> @@ -1716,7 +1718,7 @@ static bool do_floadd(DisasContext *ctx, unsigned rt, unsigned rb,
>       nullify_over(ctx);
>   
>       tmp = tcg_temp_new_i64();
> -    do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UQ);
> +    do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UQ);
>       save_frd(rt, tmp);
>   
>       if (rt == 0) {

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 6/9] target/hppa: Conceal MO_TE within do_store()

[Richard Henderson]

On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/hppa/translate.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index 4680d826345..3f78bb2a76a 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -1739,7 +1739,7 @@ static bool do_store(DisasContext *ctx, unsigned rt, unsigned rb,
>                        int modify, MemOp mop)
>   {
>       nullify_over(ctx);
> -    do_store_64(ctx, load_gpr(ctx, rt), rb, 0, 0, disp, sp, modify, mop);
> +    do_store_64(ctx, load_gpr(ctx, rt), rb, 0, 0, disp, sp, modify, MO_TE | mop);
>       return nullify_end(ctx);
>   }
>   
> @@ -3313,7 +3313,7 @@ static bool trans_st(DisasContext *ctx, arg_ldst *a)
>       if (!ctx->is_pa20 && a->size > MO_32) {
>           return gen_illegal(ctx);
>       }
> -    return do_store(ctx, a->t, a->b, a->disp, a->sp, a->m, a->size | MO_TE);
> +    return do_store(ctx, a->t, a->b, a->disp, a->sp, a->m, a->size);
>   }
>   
>   static bool trans_ldc(DisasContext *ctx, arg_ldst *a)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 7/9] target/hppa: Conceal MO_TE within do_store_32/64()

[Richard Henderson]

On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/hppa/translate.c | 8 +++++---
>   1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index 3f78bb2a76a..92071affe47 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -1637,6 +1637,7 @@ static void do_store_32(DisasContext *ctx, TCGv_i32 src, unsigned rb,
>       /* Caller uses nullify_over/nullify_end.  */
>       assert(ctx->null_cond.c == TCG_COND_NEVER);
>   
> +    mop |= MO_TE;
>       form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
>                MMU_DISABLED(ctx));
>       tcg_gen_qemu_st_i32(src, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
> @@ -1655,6 +1656,7 @@ static void do_store_64(DisasContext *ctx, TCGv_i64 src, unsigned rb,
>       /* Caller uses nullify_over/nullify_end.  */
>       assert(ctx->null_cond.c == TCG_COND_NEVER);
>   
> +    mop |= MO_TE;
>       form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
>                MMU_DISABLED(ctx));
>       tcg_gen_qemu_st_i64(src, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
> @@ -1739,7 +1741,7 @@ static bool do_store(DisasContext *ctx, unsigned rt, unsigned rb,
>                        int modify, MemOp mop)
>   {
>       nullify_over(ctx);
> -    do_store_64(ctx, load_gpr(ctx, rt), rb, 0, 0, disp, sp, modify, MO_TE | mop);
> +    do_store_64(ctx, load_gpr(ctx, rt), rb, 0, 0, disp, sp, modify, mop);
>       return nullify_end(ctx);
>   }
>   
> @@ -1752,7 +1754,7 @@ static bool do_fstorew(DisasContext *ctx, unsigned rt, unsigned rb,
>       nullify_over(ctx);
>   
>       tmp = load_frw_i32(rt);
> -    do_store_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UL);
> +    do_store_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UL);
>   
>       return nullify_end(ctx);
>   }
> @@ -1772,7 +1774,7 @@ static bool do_fstored(DisasContext *ctx, unsigned rt, unsigned rb,
>       nullify_over(ctx);
>   
>       tmp = load_frd(rt);
> -    do_store_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UQ);
> +    do_store_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UQ);
>   
>       return nullify_end(ctx);
>   }

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 8/9] target/hppa: Introduce mo_endian() helper

[Richard Henderson]

On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
> mo_endian() returns the target endianness.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/hppa/translate.c | 15 ++++++++++-----
>   1 file changed, 10 insertions(+), 5 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 9/9] target/hppa: Replace MO_TE -> MO_BE

[Richard Henderson]

On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
> We only build the PA-RISC targets using big endianness order:
> 
>    $ git grep TARGET_BIG_ENDIAN configs/targets/hppa-*
>    configs/targets/hppa-linux-user.mak:5:TARGET_BIG_ENDIAN=y
>    configs/targets/hppa-softmmu.mak:2:TARGET_BIG_ENDIAN=y
> 
> Therefore the MO_TE definition always expands to MO_BE. Use the
> latter to simplify.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/hppa/translate.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index 6fec63cb433..c9009441ad0 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -106,7 +106,7 @@ typedef struct DisasContext {
>   
>   static inline MemOp mo_endian(DisasContext *ctx)
>   {
> -    return MO_TE;
> +    return MO_BE;
>   }
>   
>   /* Note that ssm/rsm instructions number PSW_W and PSW_E differently.  */

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Indeed.  Like ppc64, hppa always defaults to big-endian and has a PSW bit to enable 
little-endian.  (Which we don't implement, and quite possibly was never implemented in any 
hardware.)


r~

Re: [PATCH 9/9] target/hppa: Replace MO_TE -> MO_BE

[Philippe Mathieu-Daudé]

On 9/10/25 19:04, Richard Henderson wrote:
> On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
>> We only build the PA-RISC targets using big endianness order:
>>
>>    $ git grep TARGET_BIG_ENDIAN configs/targets/hppa-*
>>    configs/targets/hppa-linux-user.mak:5:TARGET_BIG_ENDIAN=y
>>    configs/targets/hppa-softmmu.mak:2:TARGET_BIG_ENDIAN=y
>>
>> Therefore the MO_TE definition always expands to MO_BE. Use the
>> latter to simplify.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>>   target/hppa/translate.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
>> index 6fec63cb433..c9009441ad0 100644
>> --- a/target/hppa/translate.c
>> +++ b/target/hppa/translate.c
>> @@ -106,7 +106,7 @@ typedef struct DisasContext {
>>   static inline MemOp mo_endian(DisasContext *ctx)
>>   {
>> -    return MO_TE;
>> +    return MO_BE;
>>   }
>>   /* Note that ssm/rsm instructions number PSW_W and PSW_E 
>> differently.  */
> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> 
> Indeed.  Like ppc64, hppa always defaults to big-endian and has a PSW 
> bit to enable little-endian.  (Which we don't implement, and quite 
> possibly was never implemented in any hardware.)

Indeed, per parisc2.0.pdf:

   PSW_E
   Little endian memory access enable. When 0, all memory references
   are big endian. When 1, all memory references are little endian.
   Implementation of this bit is optional. If it is not implemented,
   all memory references are big endian and this bit is a reserved bit.

I'll squash:

    /* The PSW_E bit sets the (little) endianness, but we don't 
implement it. */

Thanks,

Phil.

Re: [PATCH 0/9] target/hppa: Remove use of MO_TE definition

[Philippe Mathieu-Daudé]

On 9/10/25 12:10, Philippe Mathieu-Daudé wrote:
> - Replace a pair of target_ulong types
> - Replace MO_TE -> MO_BE
> 
> Philippe Mathieu-Daudé (9):
>    target/hppa: Use hwaddr type for HPPATLBEntry::pa
>    target/hppa: Have hppa_form_gva*() return vaddr type
>    target/hppa: Explode MO_TExx -> MO_TE | MO_xx
>    target/hppa: Conceal MO_TE within do_load()
>    target/hppa: Conceal MO_TE within do_load_32/64()
>    target/hppa: Conceal MO_TE within do_store()
>    target/hppa: Conceal MO_TE within do_store_32/64()
>    target/hppa: Introduce mo_endian() helper
>    target/hppa: Replace MO_TE -> MO_BE

Series queued, thanks.