From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.33) id 1BizH0-0000yN-RV for qemu-devel@nongnu.org; Fri, 09 Jul 2004 13:34:58 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.33) id 1BizGz-0000y4-Up for qemu-devel@nongnu.org; Fri, 09 Jul 2004 13:34:58 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.33) id 1BizGz-0000y1-SR for qemu-devel@nongnu.org; Fri, 09 Jul 2004 13:34:57 -0400 Received: from [62.253.162.41] (helo=mta01-svc.ntlworld.com) by monty-python.gnu.org with esmtp (Exim 4.34) id 1BizEg-0005nn-PF for qemu-devel@nongnu.org; Fri, 09 Jul 2004 13:32:35 -0400 Received: from [10.10.10.100] ([81.107.87.144]) by mta01-svc.ntlworld.com (InterMail vM.4.01.03.37 201-229-121-137-20020806) with ESMTP id <20040709173202.KCQK19746.mta01-svc.ntlworld.com@[10.10.10.100]> for ; Fri, 9 Jul 2004 18:32:02 +0100 Subject: Re: [Qemu-devel] (Before) RFC for new features From: Antony T Curtis In-Reply-To: <40F00D38.8050605@witch.dyndns.org> References: <40F00D38.8050605@witch.dyndns.org> Content-Type: text/plain Message-Id: <1089394353.59382.203.camel@pcgem.rdg.cyberkinetica.com> Mime-Version: 1.0 Date: Fri, 09 Jul 2004 18:32:33 +0100 Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Sat, 2004-07-10 at 16:37, Hetz Ben Hamo wrote: > Natalia Portillo wrote: > > * 1 Chipset (Intel Natoma) > > > > We should have more? > > If anyone can put more, great! > > How many chipset do you know that support Intel's Pentium Pro? Another > chipset might require MMX/SSE support, not mentioning the BIOS support > which is needed... I don't think that the chipset particularly cares what extended instructions the CPU can execute... However, BIOS support we are definitely lacking. IIRC, the BIOS we are using doesn't do any PCI setup - so we rely on some code in pc.c and pci.c to make the chipset look configured and to set up the BARs. -- Antony T Curtis