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From: Joe Batt <Joe@soliddesign.net>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] ix64 target support
Date: Tue, 28 Sep 2004 16:37:17 -0500	[thread overview]
Message-ID: <1096407437.4234.711.camel@fred.soliddesign.net> (raw)
In-Reply-To: <cd8ecdef0409281358425658a3@mail.gmail.com>

Actually, I'm just interested in 64bit address space, so any 64 bit chip
with a Linux distro would be great.  Would some old 64 bit risc chip
(Alhpa or HPPA) be easier?

I assume a lot of the interrupt and memory management can be adapted
from the x86 qemu code.  The SH2 was pretty simple in this respect and
there was only one "mode".  Anyone out there want to help me work though
some of this?

Volume 3 from 
http://www.amd.com/us-en/Processors/DevelopWithAMD/0,,30_2252_739_7044,00.html
lists all the opcodes and what they do.  I started the SH2 emulator by
writing tests for each opcode, then the implementation from a document
like this.  Is there anything else I need to evaluate before I start
implementing opcodes?

Joe

On Tue, 2004-09-28 at 15:58, Karl Magdsick wrote:
> There is the ia64 architecture (Itanium) and the amd64 architecture
> (Opteron, Athlon64, formerly known as x86_64).  (The Linux kernel
> still uses the old architecture name, but some linux (??most??)
> distributions have adopted the manufacturer's official name for the
> architecture.)
> 
> I assume you're talking about amd64.
...

  reply	other threads:[~2004-09-28 21:44 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-09-28 16:52 [Qemu-devel] ix64 target support Joe Batt
2004-09-28 17:50 ` Johannes Schindelin
2004-09-28 20:58 ` Karl Magdsick
2004-09-28 21:37   ` Joe Batt [this message]
2004-09-29  3:17     ` Kyle Hayes
2004-09-29  9:35       ` [Qemu-devel] " Andi Kleen
2004-09-29 13:12     ` [Qemu-devel] " Paul Brook

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