From: olivier cozette <olivier.cozette@u-picardie.fr>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] Question about softmmu
Date: Sun, 7 Nov 2004 01:51:59 +0100 [thread overview]
Message-ID: <1099788719.418d71af8a4f1@webmail.u-picardie.fr> (raw)
Hello,
>I'm reading the QEMU code. I have a question haunting my mind for some time
>about tb flushing due to MMU change. Generally, whenever the page table has
>any change, we should flush the tb hash table. But I only see in the code that
>when CR3 is changed, the tb_flush is called. What if the CR3 does not change,
>but some level 2 page table in the memory change, should the tb also be
>flushed?
In this case, in the real processor (see Intel Manual), the processor TLBs (it's
like the Qemu tb) are not flushed, so Qemu act as a real processor.
Olivier
next reply other threads:[~2004-11-07 1:01 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-11-07 0:51 olivier cozette [this message]
2004-11-08 0:32 ` Another related question Re: [Qemu-devel] Question about softmmu Ye Wen
-- strict thread matches above, loose matches on Subject: below --
2004-11-07 7:15 Blue Swirl
2004-11-06 5:22 Ye Wen
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