Re: [PATCH v2 9/9] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation

[Robin Murphy <robin.murphy@arm.com>]

On 2020-07-02 16:26, Eric Auger wrote:
> Expose the RIL bit so that the guest driver uses range
> invalidation.

Hmm, this is a v3.2 feature... so strictly, in order to advertise it you 
would need to claim at least v3.1 in SMMU_AIDR and implement all the 
mandatory v3.1 behaviour ;)

Robin.

> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   hw/arm/smmuv3-internal.h | 1 +
>   hw/arm/smmuv3.c          | 2 ++
>   2 files changed, 3 insertions(+)
> 
> diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h
> index 5babf72f7d..4e7ec252ed 100644
> --- a/hw/arm/smmuv3-internal.h
> +++ b/hw/arm/smmuv3-internal.h
> @@ -54,6 +54,7 @@ REG32(IDR1,                0x4)
>   
>   REG32(IDR2,                0x8)
>   REG32(IDR3,                0xc)
> +    FIELD(IDR3, RIL,          10, 1);
>   REG32(IDR4,                0x10)
>   REG32(IDR5,                0x14)
>        FIELD(IDR5, OAS,         0, 3);
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index 89ab11fc36..add4ba4543 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -254,6 +254,8 @@ static void smmuv3_init_regs(SMMUv3State *s)
>       s->idr[1] = FIELD_DP32(s->idr[1], IDR1, EVENTQS, SMMU_EVENTQS);
>       s->idr[1] = FIELD_DP32(s->idr[1], IDR1, CMDQS,   SMMU_CMDQS);
>   
> +    s->idr[3] = FIELD_DP32(s->idr[3], IDR3, RIL, 1);
> +
>      /* 4K and 64K granule support */
>       s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN4K, 1);
>       s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN64K, 1);
>