From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.33) id 1Cflxn-0003hF-DF for qemu-devel@nongnu.org; Sat, 18 Dec 2004 16:18:07 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.33) id 1Cflxm-0003gh-Cq for qemu-devel@nongnu.org; Sat, 18 Dec 2004 16:18:06 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.33) id 1Cflxm-0003ge-AK for qemu-devel@nongnu.org; Sat, 18 Dec 2004 16:18:06 -0500 Received: from [216.254.0.201] (helo=mail1.speakeasy.net) by monty-python.gnu.org with esmtp (TLSv1:DES-CBC3-SHA:168) (Exim 4.34) id 1CflTt-0000FD-4y for qemu-devel@nongnu.org; Sat, 18 Dec 2004 15:47:13 -0500 Received: from dsl081-088-222.lax1.dsl.speakeasy.net (HELO [192.168.111.2]) ([64.81.88.222]) (envelope-sender ) by mail1.speakeasy.net (qmail-ldap-1.03) with SMTP for ; 18 Dec 2004 20:47:10 -0000 Subject: Re: [Qemu-devel] SMB for DOS ? From: "John R. Hogerhuis" In-Reply-To: <200412181832.24252.paul@codesourcery.com> References: <41C20E6A.7010507@bellard.org> <03BFD3A6-4FBC-11D9-8729-00039307264A@stanfordalumni.org> <20041218181323.GB8020@mail.13thfloor.at> <200412181832.24252.paul@codesourcery.com> Content-Type: text/plain Message-Id: <1103402896.21894.66.camel@aragorn> Mime-Version: 1.0 Date: Sat, 18 Dec 2004 12:48:16 -0800 Content-Transfer-Encoding: 7bit Reply-To: jhoger@pobox.com, qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Sat, 2004-12-18 at 10:32, Paul Brook wrote: > > > I hope you will not forget us poor mac users. Optimizing x86 on ppc > > > performance would make a number of people very happy, I'd say. > > > > performance on ppc can become very good because > > there are much more registers available for emulating > > the x86 stuff ... > > The really slow bit tends to be MMU emulation, and more host registers doesn't > help here. Mapping all guest registers directly onto host registers probably > doesn't make all that much difference as the values will tend to be in L1 > cache anyway. > > Paul > This raises an interesting question in my mind, given the existence of "reconfigurable computing" where you have a PCI card containing an FPGA loaded onto your machine (such things do exist, and I expect in the future to start seeing these things standard on motherboards). Certainly an MMU can be created in FPGA code. There is an interesting article on reconfigurable computing in this month's Linux Journal, btw. What kinds of generic hardware based support would really speed up emulation of other CPUs? Of course, one could also ask the question of what would be an ideal CPU instruction set for emulating other CPUs. But if one narrowed the focus to things that could be accomplished by an FPGA hooked to the bus, it could actually be implemented by anyone with the interest to do it, whereas making a new CPU is an expensive undertaking. Might be an interesting project for a graduate student. -- John.