* [Qemu-devel] Misc PPC fixes
@ 2005-04-18 8:36 J. Mayer
0 siblings, 0 replies; only message in thread
From: J. Mayer @ 2005-04-18 8:36 UTC (permalink / raw)
To: qemu-devel
[-- Attachment #1: Type: text/plain, Size: 279 bytes --]
Here are miscellaneous PPC emulation fixes:
- remove the ugly "stop" pseudo-opcode.
- fix fsqrt instruction (there's no fsqrt.).
- floating point load and store are not integer instructions.
- wrong opcode for dcba instructions.
--
J. Mayer <l_indien@magic.fr>
Never organized
[-- Attachment #2: ppc_fixes.diff --]
[-- Type: text/x-patch, Size: 6044 bytes --]
Index: target-ppc/translate.c
===================================================================
RCS file: /cvsroot/qemu/qemu/target-ppc/translate.c,v
retrieving revision 1.28
diff -u -d -w -B -b -d -p -r1.28 translate.c
--- target-ppc/translate.c 13 Mar 2005 17:01:22 -0000 1.28
+++ target-ppc/translate.c 18 Apr 2005 07:58:42 -0000
@@ -325,12 +329,6 @@ GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0
RET_INVAL(ctx);
}
-/* Special opcode to stop emulation */
-GEN_HANDLER(stop, 0x06, 0x00, 0xFF, 0x03FFFFC1, PPC_COMMON)
-{
- RET_EXCP(ctx, EXCP_HLT, 0);
-}
-
static opc_handler_t invalid_handler = {
.inval = 0xFFFFFFFF,
.type = PPC_NONE,
@@ -867,7 +865,19 @@ _GEN_FLOAT_ACB(sel, sel, 0x3F, 0x17, 0);
GEN_FLOAT_AB(sub, 0x14, 0x000007C0);
/* Optional: */
/* fsqrt */
-GEN_FLOAT_BS(sqrt, 0x3F, 0x16);
+GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_OPT)
+{
+ if (!ctx->fpu_enabled) {
+ RET_EXCP(ctx, EXCP_NO_FP, 0);
+ return;
+ }
+ gen_op_reset_scrfx();
+ gen_op_load_fpr_FT0(rB(ctx->opcode));
+ gen_op_fsqrt();
+ gen_op_store_FT0_fpr(rD(ctx->opcode));
+ if (Rc(ctx->opcode))
+ gen_op_set_Rc1();
+}
GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_OPT)
{
@@ -1434,7 +1500,7 @@ GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x03
/*** Floating-point load ***/
#define GEN_LDF(width, opc) \
-GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
+GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \
{ \
uint32_t simm = SIMM(ctx->opcode); \
if (!ctx->fpu_enabled) { \
@@ -1453,7 +1519,7 @@ GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0
}
#define GEN_LDUF(width, opc) \
-GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
+GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \
{ \
uint32_t simm = SIMM(ctx->opcode); \
if (!ctx->fpu_enabled) { \
@@ -1474,7 +1540,7 @@ GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF
}
#define GEN_LDUXF(width, opc) \
-GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_INTEGER) \
+GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_FLOAT) \
{ \
if (!ctx->fpu_enabled) { \
RET_EXCP(ctx, EXCP_NO_FP, 0); \
@@ -1494,7 +1560,7 @@ GEN_HANDLER(l##width##ux, 0x1F, 0x17, op
}
#define GEN_LDXF(width, opc2, opc3) \
-GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_INTEGER) \
+GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_FLOAT) \
{ \
if (!ctx->fpu_enabled) { \
RET_EXCP(ctx, EXCP_NO_FP, 0); \
@@ -1525,7 +1591,7 @@ GEN_LDFS(fs, 0x10);
/*** Floating-point store ***/
#define GEN_STF(width, opc) \
-GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
+GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \
{ \
uint32_t simm = SIMM(ctx->opcode); \
if (!ctx->fpu_enabled) { \
@@ -1544,7 +1610,7 @@ GEN_HANDLER(st##width, opc, 0xFF, 0xFF,
}
#define GEN_STUF(width, opc) \
-GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \
+GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \
{ \
uint32_t simm = SIMM(ctx->opcode); \
if (!ctx->fpu_enabled) { \
@@ -1564,7 +1630,7 @@ GEN_HANDLER(st##width##u, opc, 0xFF, 0xF
}
#define GEN_STUXF(width, opc) \
-GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_INTEGER) \
+GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_FLOAT) \
{ \
if (!ctx->fpu_enabled) { \
RET_EXCP(ctx, EXCP_NO_FP, 0); \
@@ -1583,7 +1649,7 @@ GEN_HANDLER(st##width##ux, 0x1F, 0x17, o
}
#define GEN_STXF(width, opc2, opc3) \
-GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_INTEGER) \
+GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_FLOAT) \
{ \
if (!ctx->fpu_enabled) { \
RET_EXCP(ctx, EXCP_NO_FP, 0); \
@@ -2370,7 +2159,7 @@ GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03
/* Optional: */
/* dcba */
-GEN_HANDLER(dcba, 0x1F, 0x16, 0x07, 0x03E00001, PPC_CACHE_OPT)
+GEN_HANDLER(dcba, 0x1F, 0x16, 0x17, 0x03E00001, PPC_CACHE_OPT)
{
}
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2005-04-18 8:51 UTC | newest]
Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2005-04-18 8:36 [Qemu-devel] Misc PPC fixes J. Mayer
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).