From: "J. Mayer" <l_indien@magic.fr>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [Patch] target-ppc mtcrf instruction not recognized
Date: Sat, 14 May 2005 20:15:47 +0200 [thread overview]
Message-ID: <1116094547.12010.73.camel@rapid> (raw)
In-Reply-To: <1A902C2A-9E03-42FB-BBFC-B84AA84A5A3E@free.fr>
On Sat, 2005-05-14 at 19:20 +0200, Pierre d'Herbemont wrote:
> Hi,
>
> I have been playing with ppc-darwin-user. And I have to say that qemu-
> ppc is too strict with ppc opcode validity:
> On Mac OS X binary release called Tiger (or 10.4), the __bzero
> function [1] contains a mtcrf, which has been translated to
> 0x7c901120, by Apple's as. Current qemu rejects it, saying it is
> invalid. According to the IBM Specification the mtcrf instruction
> [2], contains reserved flags, for which the values are unknown. qemu
> assumes that those are set to 1, which is obviously wrong. The
> attached patch provides a fix.
Qemu assume all reserved fields are set to zero, not 1.
PowerPC specifications says: (section 8.1 of PEM)
"Some instructions fields are reserved or must contain a predefined
value as shown in the individual instruction layouts. If a reserved
field does not have all bits cleared, or if a field that must contain a
particular value does not contains that value, the instruction form is
invalid ..."
In section 4.1.3.2:
"Invalid forms result when a bit or openrands is coded incorrectly, for
example, or when a reserved bit (shown as '0') is coded as '1'.
and
"an attempt to execute an invalid form of an instruction either invokes
the illegal instruction error handler (or program exception) or yields
boundedly-undefined results.
In the case of mtcrf, the PowerPC specification says the bits 11, 21 and
31 (IBM notation) _must_ be zero.
This is what is described in 32 bits PEM as well as 64 bits PEM
(including the latest revision dated on 31/03/2005) and the 740/750
PowerPC user manual (which is the one currently emulated by Qemu).
It would be acceptable to relax the check if it would make MacOS X 10.4
boot.
But in this case, only the bit 11 (which causes the problem here) should
be relaxed.
Then, the bit mask becomes 0x00000801 (not 0x00000000).
> [2]
http://publibn.boulder.ibm.com/doc_link/en_US/a_doc_lib/aixassem/alangref/mtcrf.htm
This is the language reference for POWER & PowerPC.
Some forms described in this documentation are valid only for POWER
CPUs.
Please use PowerPC Environment Manual for PowerPC only specifications.
--
J. Mayer <l_indien@magic.fr>
Never organized
next prev parent reply other threads:[~2005-05-14 18:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-05-14 17:20 [Qemu-devel] [Patch] target-ppc mtcrf instruction not recognized Pierre d'Herbemont
2005-05-14 18:15 ` J. Mayer [this message]
2005-05-14 19:03 ` Pierre d'Herbemont
2005-05-15 12:00 ` J. Mayer
2005-05-16 7:54 ` Benjamin Herrenschmidt
2005-05-17 20:17 ` Pierre d'Herbemont
2005-05-17 21:10 ` J. Mayer
2005-05-18 9:06 ` Herbert Poetzl
2005-05-18 10:28 ` J. Mayer
[not found] ` <da63183705051610384e40c3de@mail.gmail.com>
[not found] ` <da631837050516110638c65163@mail.gmail.com>
2005-05-16 21:14 ` J. Mayer
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