* [PATCH] docs: fix typo in xive doc
@ 2025-08-27 5:32 Aditya Gupta
2025-08-27 8:03 ` Thomas Huth
2025-08-29 10:00 ` Gautam Menghani
0 siblings, 2 replies; 4+ messages in thread
From: Aditya Gupta @ 2025-08-27 5:32 UTC (permalink / raw)
To: Gautam Menghani; +Cc: qemu-devel, qemu-ppc
"Interrupt Pending Buffer" IPB, which got written as IBP due to typo.
The "IPB" register is also mentioned in same doc multiple times.
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
---
docs/specs/ppc-xive.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/specs/ppc-xive.rst b/docs/specs/ppc-xive.rst
index 83d43f658b90..968cc760d466 100644
--- a/docs/specs/ppc-xive.rst
+++ b/docs/specs/ppc-xive.rst
@@ -157,7 +157,7 @@ Interrupt flow from an O/S perspective
After an event data has been enqueued in the O/S Event Queue, the IVPE
raises the bit corresponding to the priority of the pending interrupt
-in the register IBP (Interrupt Pending Buffer) to indicate that an
+in the register IPB (Interrupt Pending Buffer) to indicate that an
event is pending in one of the 8 priority queues. The Pending
Interrupt Priority Register (PIPR) is also updated using the IPB. This
register represent the priority of the most favored pending
--
2.50.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] docs: fix typo in xive doc
2025-08-27 5:32 [PATCH] docs: fix typo in xive doc Aditya Gupta
@ 2025-08-27 8:03 ` Thomas Huth
2025-08-29 4:05 ` Aditya Gupta
2025-08-29 10:00 ` Gautam Menghani
1 sibling, 1 reply; 4+ messages in thread
From: Thomas Huth @ 2025-08-27 8:03 UTC (permalink / raw)
To: Aditya Gupta, Gautam Menghani; +Cc: qemu-devel, qemu-ppc, QEMU Trivial
On 27/08/2025 07.32, Aditya Gupta wrote:
> "Interrupt Pending Buffer" IPB, which got written as IBP due to typo.
>
> The "IPB" register is also mentioned in same doc multiple times.
>
> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
> ---
> docs/specs/ppc-xive.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/docs/specs/ppc-xive.rst b/docs/specs/ppc-xive.rst
> index 83d43f658b90..968cc760d466 100644
> --- a/docs/specs/ppc-xive.rst
> +++ b/docs/specs/ppc-xive.rst
> @@ -157,7 +157,7 @@ Interrupt flow from an O/S perspective
>
> After an event data has been enqueued in the O/S Event Queue, the IVPE
> raises the bit corresponding to the priority of the pending interrupt
> -in the register IBP (Interrupt Pending Buffer) to indicate that an
> +in the register IPB (Interrupt Pending Buffer) to indicate that an
> event is pending in one of the 8 priority queues. The Pending
> Interrupt Priority Register (PIPR) is also updated using the IPB. This
> register represent the priority of the most favored pending
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] docs: fix typo in xive doc
2025-08-27 8:03 ` Thomas Huth
@ 2025-08-29 4:05 ` Aditya Gupta
0 siblings, 0 replies; 4+ messages in thread
From: Aditya Gupta @ 2025-08-29 4:05 UTC (permalink / raw)
To: Thomas Huth, Gautam Menghani; +Cc: qemu-devel, qemu-ppc, QEMU Trivial
On 27/08/25 13:33, Thomas Huth wrote:
> On 27/08/2025 07.32, Aditya Gupta wrote:
>> "Interrupt Pending Buffer" IPB, which got written as IBP due to typo.
>>
>> The "IPB" register is also mentioned in same doc multiple times.
>>
>> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
>> ---
>> docs/specs/ppc-xive.rst | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/docs/specs/ppc-xive.rst b/docs/specs/ppc-xive.rst
>> index 83d43f658b90..968cc760d466 100644
>> --- a/docs/specs/ppc-xive.rst
>> +++ b/docs/specs/ppc-xive.rst
>> @@ -157,7 +157,7 @@ Interrupt flow from an O/S perspective
>> After an event data has been enqueued in the O/S Event Queue, the
>> IVPE
>> raises the bit corresponding to the priority of the pending interrupt
>> -in the register IBP (Interrupt Pending Buffer) to indicate that an
>> +in the register IPB (Interrupt Pending Buffer) to indicate that an
>> event is pending in one of the 8 priority queues. The Pending
>> Interrupt Priority Register (PIPR) is also updated using the IPB. This
>> register represent the priority of the most favored pending
>
> Reviewed-by: Thomas Huth <thuth@redhat.com>
Thanks for the tag, Thomas !
- Aditya G
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] docs: fix typo in xive doc
2025-08-27 5:32 [PATCH] docs: fix typo in xive doc Aditya Gupta
2025-08-27 8:03 ` Thomas Huth
@ 2025-08-29 10:00 ` Gautam Menghani
1 sibling, 0 replies; 4+ messages in thread
From: Gautam Menghani @ 2025-08-29 10:00 UTC (permalink / raw)
To: Aditya Gupta; +Cc: qemu-devel, qemu-ppc
On Wed, Aug 27, 2025 at 11:02:28AM +0530, Aditya Gupta wrote:
> "Interrupt Pending Buffer" IPB, which got written as IBP due to typo.
>
> The "IPB" register is also mentioned in same doc multiple times.
>
> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
> ---
> docs/specs/ppc-xive.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/docs/specs/ppc-xive.rst b/docs/specs/ppc-xive.rst
> index 83d43f658b90..968cc760d466 100644
> --- a/docs/specs/ppc-xive.rst
> +++ b/docs/specs/ppc-xive.rst
> @@ -157,7 +157,7 @@ Interrupt flow from an O/S perspective
>
> After an event data has been enqueued in the O/S Event Queue, the IVPE
> raises the bit corresponding to the priority of the pending interrupt
> -in the register IBP (Interrupt Pending Buffer) to indicate that an
> +in the register IPB (Interrupt Pending Buffer) to indicate that an
> event is pending in one of the 8 priority queues. The Pending
> Interrupt Priority Register (PIPR) is also updated using the IPB. This
> register represent the priority of the most favored pending
Reviewed-by: Gautam Menghani <gautam@linux.ibm.com>
> --
> 2.50.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2025-08-27 5:32 [PATCH] docs: fix typo in xive doc Aditya Gupta
2025-08-27 8:03 ` Thomas Huth
2025-08-29 4:05 ` Aditya Gupta
2025-08-29 10:00 ` Gautam Menghani
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