[Qemu-devel] [PATCH] usb-uhci.c: save/load state implementation

[Lonnie Mendez <lmendez19@austin.rr.com>]

[-- Attachment #1: Type: text/plain, Size: 730 bytes --]

    lo list.  Attached is a patch that implements save/load state for
the uhci controller.  The code will only work well if you remove all usb
devices attached to the guest prior to saving the vm state.  There is no
code yet that tries to reconstruct the ports list.

    I'm sure there will need to be additional code to the handle the
case of previously attached devices - this is difficult because the
device(s) could have been removed, the device state could have changed,
etc.

Test case with windows xp guest.

(qemu) stop
(qemu) savevm test1
(qemu) quit

qemu -hda winxp.qcow2 -localtime -usb -no-acpi -kernel-kqemu -loadvm
test1

Adding the usb tablet after resuming the guest results in a functional
tablet input device.

[-- Attachment #2: qemu-uhci-savestate.diff --]
[-- Type: text/x-patch, Size: 2010 bytes --]

--- qemu/hw/usb-uhci.c	2006-08-11 20:04:27.000000000 -0500
+++ qemu/hw/usb-uhci.c	2006-11-24 17:46:18.000000000 -0600
@@ -144,6 +144,62 @@
     }
 }
 
+static void uhci_save(QEMUFile *f, void *opaque)
+{
+    UHCIState *s = opaque;
+    uint8_t num_ports = NB_PORTS;
+    int i;
+    
+    pci_device_save(&s->dev, f);
+    
+    qemu_put_8s(f, &num_ports);
+    for (i = 0; i < num_ports; ++i)
+        qemu_put_be16s(f, &s->ports[i].ctrl);
+    qemu_put_be16s(f, &s->cmd);
+    qemu_put_be16s(f, &s->status);
+    qemu_put_be16s(f, &s->intr);
+    qemu_put_be16s(f, &s->frnum);
+    qemu_put_be32s(f, &s->fl_base_addr);
+    qemu_put_8s(f, &s->sof_timing);
+    qemu_put_8s(f, &s->status2);
+    qemu_put_timer(f, s->frame_timer);
+    qemu_put_be32s(f, &s->pending_int_mask);
+    qemu_put_be32s(f, &s->async_qh);
+}
+
+static int uhci_load(QEMUFile* f,void* opaque,int version_id)
+{
+    UHCIState *s = opaque;
+    uint8_t num_ports;
+    int i, ret;
+
+    if (version_id > 1)
+        return -EINVAL;
+
+    ret = pci_device_load(&s->dev, f);
+    if (ret < 0)
+        return ret;
+    
+    qemu_get_8s(f, &num_ports);
+    if (num_ports != NB_PORTS)
+        return -EINVAL;
+    
+    for (i = 0; i < num_ports; ++i)
+        qemu_get_be16s(f, &s->ports[i].ctrl);
+    qemu_get_be16s(f, &s->cmd);
+    qemu_get_be16s(f, &s->status);
+    qemu_get_be16s(f, &s->intr);
+    qemu_get_be16s(f, &s->frnum);
+    qemu_get_be32s(f, &s->fl_base_addr);
+    qemu_get_8s(f, &s->sof_timing);
+    qemu_get_8s(f, &s->status2);
+    qemu_get_timer(f, s->frame_timer);
+    qemu_get_be32s(f, &s->pending_int_mask);
+    qemu_get_be32s(f, &s->async_qh);
+    
+    return 0;
+}
+
 static void uhci_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
 {
     UHCIState *s = opaque;
@@ -793,4 +849,6 @@
        to rely on this.  */
     pci_register_io_region(&s->dev, 4, 0x20, 
                            PCI_ADDRESS_SPACE_IO, uhci_map);
+    
+    register_savevm("uhci", 0, 1, uhci_save, uhci_load, s);
 }