From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Ig6VX-00032P-6h for qemu-devel@nongnu.org; Thu, 11 Oct 2007 18:27:55 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Ig6VV-0002zi-3J for qemu-devel@nongnu.org; Thu, 11 Oct 2007 18:27:54 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Ig6VU-0002zb-Pu for qemu-devel@nongnu.org; Thu, 11 Oct 2007 18:27:52 -0400 Received: from honiara.magic.fr ([195.154.193.36]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Ig6VU-0005ZK-8Q for qemu-devel@nongnu.org; Thu, 11 Oct 2007 18:27:52 -0400 Subject: Re: [Qemu-devel] RFC: cleanups: CPU_MEM_INDEX From: "J. Mayer" In-Reply-To: <20071011174624.GH3379@networkno.de> References: <1191958401.9976.87.camel@rapid> <20071010001238.GA3379@networkno.de> <1191992777.9976.171.camel@rapid> <1192104597.9976.214.camel@rapid> <20071011174624.GH3379@networkno.de> Content-Type: text/plain Date: Fri, 12 Oct 2007 00:27:49 +0200 Message-Id: <1192141669.9976.239.camel@rapid> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Thiemo Seufer Cc: qemu-devel@nongnu.org On Thu, 2007-10-11 at 18:46 +0100, Thiemo Seufer wrote: > J. Mayer wrote: > > On Wed, 2007-10-10 at 07:06 +0200, J. Mayer wrote: > > > On Wed, 2007-10-10 at 01:12 +0100, Thiemo Seufer wrote: > > > > J. Mayer wrote: > > > > > Here's a proposal to add a int cpu_mem_index (CPUState *env) function in > > > > > targets cpu.h header. > > > > > The idea of this patch is: > > > > > - avoid many #ifdef TARGET_xxx in exec-all.h and softmmu_header.h then > > > > > make the code more readable > > > > > - avoid multiple implementation of the same code (3, in that particular > > > > > case) this to avoid potential conflicts if the definition has to be > > > > > updated for any reason (ie support for new memory access modes, > > > > > emulation optimisation...) > > > > > > > > > > Please comment. > > > > > > > > > > -- > > > > > J. Mayer > > > > > Never organized > > > > > > > > [...] > > > > Here's an updated version of the patch. My comments about it stay valid, > > with two additions: > > 1/ when is user is needed to maintain compatibility with existing code, > > I now define it as: > > int is_user = mmu_idx == MMU_USER_IDX; > > instead of just is_user = mmu_idx. > > This definition will then remain correct even if the definition of the > > MMU modes are later changed for a specific target > > 2/ I now precompute the mmu_idx on PowerPC platform as it can never > > change inside a single TB. This may save a few instructions for every > > memory access. I guess the same optimisation can be made for the other > > targets, but not knowing exactly when it would have to be recomputed, > > for most targets, I prefer not to do this optimisation myself. > > I like this version. Tested with x86 and mips, on Linux/ppc host. Thanks for testing. I guess it's safe... but I'd like to get more reports or comments about it before applying this ! -- J. Mayer Never organized